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參數(shù)資料
| 型號(hào)： | 9DB202CGLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 封裝： | 6.50 X 4.40 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-20 |
| 文件頁(yè)數(shù)： | 9/13頁(yè) |
| 文件大?。?/td> | 673K |
| 代理商： | 9DB202CGLF |
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IDT / ICS PCI EXPRESS JITTER ATTENUATOR
5
ICS9DB202CG REV B JULY 14, 2006
ICS9DB202
PCI EXPRESS JITTER ATTENUATOR
TYPICAL PHASE NOISE AT 100MHZ
0
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1k
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100k
1M
10M
100M
100MHz
RMS Phase Jitter (Random)
1.5MHz to 22MHz = 2.42ps (typical)
OFFSET FREQUENCY (HZ)
N
OISE
P
O
WER
dBc
Hz
Phase Noise Result by adding
PCI Express Filter to raw data
PCI Express Filter
The illustrated phase noise plot was taken using a low phase
noise signal generator, the noise floor of the signal generator is
less than that of the device under test.
Using this configuration allows one to see the true spectral purity
or phase noise performance of the PLL in the device under test.
Due to the tracking ability of a PLL, it will track the input signal up
to its loop bandwidth. Therefore, if the input phase noise is greater
than that of the PLL, it will increase the output phase noise
performance of the device. It is recommended that the phase
noise performance of the input is verified in order to achieve the
above phase noise performance.
Raw Phase Noise Data
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| 9DB202CFLF | 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 9DB202CFLFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 9DB202CK-01T | 9DB SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32 |
| 9DB206CFLF | 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9DB202CGLFT | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 2 HCSL Output PCIe Buffer RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9DB202CGT | 制造商:Integrated Device Technology Inc 功能描述:9DB202CGT - Tape and Reel |
| 9DB202CK-01 | 制造商:Integrated Device Technology Inc 功能描述:9DB202CK-01 - Rail/Tube |
| 9DB202CK-01LF | 功能描述:時(shí)鐘緩沖器 2 HCSL Output PCIe Buffer RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9DB202CK-01LFT | 制造商:Integrated Device Technology Inc 功能描述:PLL Frequency Synthesizer Single 32-Pin VFQFPN EP T/R 制造商:Integrated Device Technology Inc 功能描述:PLL FREQ SYNTHESIZER SGL 32PIN VFQFPN - Tape and Reel 制造商:Integrated Device Technology Inc 功能描述:2 HCSL Output PCIe Buffer |
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