參數(shù)資料
型號: 9883
廠商: Intel Corp.
英文描述: Advanced 10/100 Umnmanaged Repeater
中文描述: 高級10/100 Umnmanaged直放站
文件頁數(shù): 21/56頁
文件大?。?/td> 719K
代理商: 9883
Advanced 10/100 Unmanaged Repeater
LXT9883/9863
Datasheet
Document #: 249115
Revision #: 003
Rev. Date: 08/07/01
21
Each supply input should be decoupled to ground. Refer to
Table 6 on page 15
for power and
ground pin assignments, and to the
"General Design Guidelines
on page 32.
.
3.5.2
Clock
A stable, external 25MHz reference clock source (TTL) is required to the CLK25 pin. The
reference clock is used to generate transmit signals and recover receive signals. A crystal-based
clock is recommended over a derived clock (i.e., PLL-based) to minimize transmit jitter. Refer to
Table 18 on page 37
for a list of recommended oscillators and to
Table 21 on page 44
for clock
timing requirements.
3.5.3
Bias Resistor
The RBIAS input requires a 22.1 k
, 1% resistor connected to ground.
3.5.4
Reset
At power-up, the reset input must be held Low until VCC reaches at least 3.15V. A buffer should be
used to drive reset if there are multiple LXT98x3 devices. The clock must be active.
3.5.5
IRB Bus Pull-ups
Even when the LXT98x3 is used in a stand-alone configuration, pull-up resistors are required on
the IRB signals. See
Figure 16
and
Figure 17 on page 43
.
3.6
LED Operation
The LXT98x3 drives the most commonly used LEDs directly (see
"Direct Drive LEDs
on
page 24.
). The less frequently used LEDs are optionally driven via a serial bus to inexpensive
Serial-to-Parallel devices (see
Serial LEDs
on this page).
3.6.1
LEDs at Start-up
For approximately 2 seconds after the LXT98x3 is reset, all LEDs are driven to the ON state. This
start-up routine is an LED check.
100 Mbps IRB
10 Mbps IRB
IR100CFS
IR10DAT
IR100CFSBP
IR10ENA
IR100DV
IR10COL
IR100CLK
IR10CFS
IR10COLBP
IR10CFSBP
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