參數(shù)資料
型號: 97U877YK-T
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 97U SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC40
封裝: PLASTIC, MLF-40
文件頁數(shù): 5/13頁
文件大?。?/td> 640K
代理商: 97U877YK-T
13
ICS97U877
0792A—04/15/04
Ordering Information
97U877yKLF-T
Example:
Designation for tape and reel packaging
Lead Free (Optional)
Package Type
K = MLF
Revision Designator (will not correlate with datasheet revision)
Device Type
XXXX y K LF- T
Top View
Index Area
1
E
D
Sawn
Singulation
Anvil
Singulation
or
A
0.08
C
A3
A1
Seating Plane
E2
2
L
(N
-1)x e
(Ref.)
D
(Ref.)
N& N
Even
D
E
N
e
D2
2
D2
D
E
(Ref.)
N& N
Odd
1
2
e
2
(Typ.)
If N & N
are Even
(N -1)x e
(Ref.)
E
D
b
Thermal
Base
2
N
ALL DIMENSIONS IN MILLIMETERS
N
SYMBOL
MIN.
MAX.
ND
A
0.80
1.00
NE
A1
0
0.05
D x E BASIC
A3
D2 MIN. / MAX.
b
0.18
0.30
E2 MIN. / MAX.
e
L MIN. / MAX.
SPECIAL
NON-JEDEC
ALL DIM.
SAME EXCEPT
AS BELOW:
4.35 / 4.65
5.05 / 5.35
10-0053
Source Reference: MLF2SER
THERMALLY ENHANCED, VERY THIN, FINE PITCH
QUAD FLAT / NO LEAD PLASTIC PACKAGE
0.30 / 0.50
D2 MIN. / MAX.
E2 MIN. / MAX.
0.25 Reference
0.50 BASIC
6.00 x 6.00
2.75 / 3.05
40
10
相關(guān)PDF資料
PDF描述
97U877YKLF-T 97U SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC40
97U877YHLF-T 97U SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52
97ULP877AHLF-T 97ULP SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52
97ULP877BHLF-T 97ULP SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52
97ULP877BHLF 97ULP SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52
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