- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25514 > 951413CFLF (INTEGRATED DEVICE TECHNOLOGY INC) 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 PDF資料下載
參數(shù)資料
| 型號： | 951413CFLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 0.300 INCH, 0.025 INCH PITCH, GREEN, MO-118, SSOP-56 |
| 文件頁數(shù)： | 12/26頁 |
| 文件大小： | 257K |
| 代理商： | 951413CFLF |
2
Integrated
Circuit
Systems, Inc.
ICS951413
0929D—10/30/06
Pin Description
PIN #
PIN NAME
PIN
TYPE
DESCRIPTION
1X1
IN
Crystal input, Nominally 14.318MHz.
2X2
OUT Crystal output, Nominally 14.318MHz
3
VDD48
PWR Power pin for the 48MHz output.3.3V
4
USB_48MHz
OUT 48.00MHz USB clock
5
GND
PWR Ground pin.
6
VTT_PWRGD#/PD
IN
Vtt_PwrGd# is an active low input used to determine when latched inputs are
ready to be sampled. PD is an asynchronous active high input pin used to put
the device into a low power state. The internal clocks, PLLs and the crystal
oscillator are stopped.
7
SCLK
IN
Clock pin of SMBus circuitry, 5V tolerant.
8
SDATA
I/O
Data pin for SMBus circuitry, 5V tolerant.
9
**FS_C
IN
Frequency select latch input pin
10
**CLKREQA#
IN
Output enable for PCI Express (SRC) outputs. SMBus selects which outputs
are controlled.
0 = enabled, 1 = tri-stated
11
**CLKREQB#
IN
Output enable for PCI Express (SRC) outputs. SMBus selects which outputs
are controlled.
0 = enabled, 1 = tri-stated
12
SRCCLKT7
OUT True clock of differential SRC clock pair.
13
SRCCLKC7
OUT Complement clock of differential SRC clock pair.
14
VDDSRC
PWR Supply for SRC clocks, 3.3V nominal
15
GNDSRC
PWR Ground pin for the SRC outputs
16
SRCCLKT6
OUT True clock of differential SRC clock pair.
17
SRCCLKC6
OUT Complement clock of differential SRC clock pair.
18
SRCCLKT5
OUT True clock of differential SRC clock pair.
19
SRCCLKC5
OUT Complement clock of differential SRC clock pair.
20
GNDSRC
PWR Ground pin for the SRC outputs
21
VDDSRC
PWR Supply for SRC clocks, 3.3V nominal
22
SRCCLKT4
OUT True clock of differential SRC clock pair.
23
SRCCLKC4
OUT Complement clock of differential SRC clock pair.
24
SRCCLKT3
OUT True clock of differential SRC clock pair.
25
SRCCLKC3
OUT Complement clock of differential SRC clock pair.
26
GNDSRC
PWR Ground pin for the SRC outputs
27
ATIGCLKT1
OUT True clock of differential ATIGCLK clock pair.
28
ATIGCLKC1
OUT Complementary clock of differential ATIGCLK clock pair.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 951416AGLF | 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 951416AFLF | 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 951416AGLFT | 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 951462YGLFT | PROC SPECIFIC CLOCK GENERATOR, PDSO64 |
| 951464YFLFT | 240 MHz, OTHER CLOCK GENERATOR, PDSO56 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 951413CFLFT | 制造商:Integrated Device Technology Inc 功能描述:Programmable PLL Clock Generator Triple 56-Pin SSOP T/R |
| 951413CGLF | 制造商:Integrated Device Technology Inc 功能描述:Programmable PLL Clock Generator Triple 56-Pin TSSOP Tube |
| 951413CGLFT | 制造商:Integrated Device Technology Inc 功能描述:Programmable PLL Clock Generator Triple 56-Pin TSSOP T/R |
| 951414-2011309-AR-PT | 功能描述:集管和線殼 14P BD STCK HDR 2R STRT SMT 10U AU RoHS:否 產(chǎn)品種類:1.0MM Rectangular Connectors 產(chǎn)品類型:Headers - Pin Strip 系列:DF50 觸點類型:Pin (Male) 節(jié)距:1 mm 位置/觸點數(shù)量:16 排數(shù):1 安裝風格:SMD/SMT 安裝角:Right 端接類型:Solder 外殼材料:Liquid Crystal Polymer (LCP) 觸點材料:Brass 觸點電鍍:Gold 制造商:Hirose Connector |
| 951414-2011309-AR-TP | 功能描述:集管和線殼 14P BD STCK HDR 2R STRT SMT 10U AU RoHS:否 產(chǎn)品種類:1.0MM Rectangular Connectors 產(chǎn)品類型:Headers - Pin Strip 系列:DF50 觸點類型:Pin (Male) 節(jié)距:1 mm 位置/觸點數(shù)量:16 排數(shù):1 安裝風格:SMD/SMT 安裝角:Right 端接類型:Solder 外殼材料:Liquid Crystal Polymer (LCP) 觸點材料:Brass 觸點電鍍:Gold 制造商:Hirose Connector |
發(fā)布緊急采購，3分鐘左右您將得到回復。