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參數(shù)資料
| 型號： | 951412AFLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 0.300 INCH, 0.025 INCH PITCH, GREEN, MO-118, SSOP-56 |
| 文件頁數(shù)： | 12/25頁 |
| 文件大?。?/td> | 246K |
| 代理商： | 951412AFLFT |
2
ICS951412
0883L—04/26/06
Pin Descriptions
PIN
#
PIN NAME
PIN
TYPE
DESCRIPTION
1
X1
IN
Crystal input, Nominally 14.318MHz.
2
X2
OUT
Crystal output, Nominally 14.318MHz
3
VDD48
PWR
Power pin for the 48MHz output.3.3V
4
USB_48MHz
OUT
48.00MHz USB clock
5
GND
PWR
Ground pin.
6
NC
N/A
No Connection.
7
SCLK
IN
Clock pin of SMBus circuitry, 5V tolerant.
8
SDATA
I/O
Data pin for SMBus circuitry, 5V tolerant.
9
**FS2
IN
Frequency select pin.
10
**CLKREQA#
IN
Output enable for PCI Express (SRC) outputs. SMBus selects which
outputs are controlled.
0 = enabled, 1 = tri-stated
11
**CLKREQB#
IN
Output enable for PCI Express (SRC) outputs. SMBus selects which
outputs are controlled.
0 = enabled, 1 = tri-stated
12
SRCCLKT7
OUT
True clock of differential SRC clock pair.
13
SRCCLKC7
OUT
Complement clock of differential SRC clock pair.
14
VDDSRC
PWR
Supply for SRC clocks, 3.3V nominal
15
GNDSRC
PWR
Ground pin for the SRC outputs
16
SRCCLKT6
OUT
True clock of differential SRC clock pair.
17
SRCCLKC6
OUT
Complement clock of differential SRC clock pair.
18
SRCCLKT5
OUT
True clock of differential SRC clock pair.
19
SRCCLKC5
OUT
Complement clock of differential SRC clock pair.
20
GNDSRC
PWR
Ground pin for the SRC outputs
21
VDDSRC
PWR
Supply for SRC clocks, 3.3V nominal
22
SRCCLKT4
OUT
True clock of differential SRC clock pair.
23
SRCCLKC4
OUT
Complement clock of differential SRC clock pair.
24
SRCCLKT3
OUT
True clock of differential SRC clock pair.
25
SRCCLKC3
OUT
Complement clock of differential SRC clock pair.
26
GNDSRC
PWR
Ground pin for the SRC outputs
27
ATIGCLKT1
OUT
True clock of differential SRC clock pair.
28
ATIGCLKC1
OUT
Complementary clock of differential SRC clock pair.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 951412AGLFT | 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 951412BFLF | 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 951412AFLF | 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 951412AGLF | 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 951413CGLF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 951412AGLF | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Synthesizer Dual 56-Pin TSSOP Tube |
| 951412AGLFT | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Synthesizer Dual 56-Pin TSSOP T/R |
| 951412BFLF | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Synthesizer Dual 56-Pin SSOP Tube |
| 951412BFLFT | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Synthesizer Dual 56-Pin SSOP T/R |
| 951412BGLF | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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