參數(shù)資料
型號: 951402AGLF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產(chǎn)生/分配
英文描述: 210 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封裝: 6.10 MM, 0.50 MM PITCH, GREEN, MO-153, TSSOP-48
文件頁數(shù): 5/25頁
文件大?。?/td> 320K
代理商: 951402AGLF
13
Integrated
Circuit
Systems, Inc.
ICS951402
Advance Information
0660—05/05/05
Table 4:Skew Specification on Output Mode
Bit3
Bit2
Bit1
Bit0
Skew in ps
0
X
500
0
1
X
750
1
0
X
1000
1
X
1250
I
2C Table: Group Skew Control Register
Byte 19 Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
-
Reserved
RW
-
0
Bit 6
-
Reserved
RW
-
0
Bit 5
-
Reserved
RW
-
0
Bit 4
-
Reserved
RW
-
0
Bit 3
-
AGPSkw3
RW
0
Bit 2
-
AGPSkw2
AGP
Skew Control
RW
See 2-bit Skew
Control at table 4
0
Bit 1
-
Reserved
RW
-
0
Bit 0
-
Reserved
RW
-
0
I
2C Table: Group Skew Control Register
Byte 20 Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
-
PCISkw3
RW
0
Bit 6
-
PCISkw2
PCI_F [1:0]
Skew Control
RW
See 2-bit Skew
Control at table 4
0
Bit 5
-
Reserved
RW
-
0
Bit 4
-
Reserved
RW
-
0
Bit 3
-
PCISkw1
RW
0
Bit 2
-
PCISkw0
PCI [5:0]
Skew Control
RW
See 2-bit Skew
Control at table 4
0
Bit 1
-
Reserved
RW
-
0
Bit 0
-
Reserved
RW
-
0
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