參數(shù)資料
型號(hào): 9402AVK
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝: 14 X 14 MM, 2 MM HEIGHT, PLASTIC, MS-022, MQFP-80
文件頁數(shù): 121/126頁
文件大?。?/td> 1673K
代理商: 9402AVK
DATA SHEET
94
Aug. 16, 2004; 6251-552-1DS
Micronas
Subaddress 8Fh (Read-only, NOT compatible to 940X family)
D3
SLS
[CP-I2C]
Line Standard At Device Output
‘0’: 100 Hz (VSP 9402A, VSP 9412A)
‘1’: 50 Hz (VSP 9432A, VSP 9442A)
D2-D0
VERSION
[CP-I2C]
Version Of VSP 94XX Family
‘001’: VSP 94x5B
‘010’: VSP 94x2A
‘011’: VSP 94x7B
‘101’: VSP 94x9C
others: reserved
Subaddress 90h (Read-only)
D7
AM50O
[CP-I2C]
Last detected Standard 50 Hz
‘0’: PAL or none
‘1’: SECAM
D6
AM60O
[CP-I2C]
Last detected Standard 60 Hz
‘0’: NTSC M or none
‘1’: NTSC44 or PAL60
D5-D0
AGCADJCV
[CP-I2C]
AGC value for ADC1
000000: smallest input range
111111: biggest input range
Subaddress 91h (Read-only)
D6-D0
VLENGTH
[CP-I2C]
Length of vertical pulse
0000000: short v
1111111: long v
Subaddress 92h (Read-only)
D7-D0
MINV
[CP-I2C]
Measured sync amplitude
00000000: smallest sync
11111111: largest sync
Subaddress 93h (Read-only)
D4-D0
PWADJCNT
[CP-I2C]
Peak White adjust counter
00000: no PW reduction
11111: largest PW reduction
Subaddress 96h (Read-only)
D0
V40STAT
[FP-I2C]
V Status bit of 40.5 MHz domain
‘0’: New write or read cycle can start
‘1’: No new write or read cycle can start
Subaddress 98h (Read-only)
D0
V36BSTAT
[BP-I2C]
V Status bit of backend 36 MHz domain
‘0’: New write or read cycle can start
‘1’: No new write or read cycle can start
Table 3–8: I2C bus command description, continued
Bit
Name
Description
相關(guān)PDF資料
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94136-608T 72 CONTACT(S), FEMALE, 40 DEGREE SINGLE PART CARD EDGE CONN, SOLDER, SOCKET
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
9402F 制造商:HH SMITH 功能描述:HARDWARE
9402H 制造商:Abbatron/HH Smith 功能描述:
9402L 制造商:Abbatron/HH Smith 功能描述:
9402M 制造商:Abbatron/HH Smith 功能描述:
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