參數(shù)資料
型號(hào): 93V850DGT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 93V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
封裝: 0.240 INCH, MO-153, TSSOP-48
文件頁(yè)數(shù): 4/10頁(yè)
文件大小: 194K
代理商: 93V850DGT
3
ICS93V850
Preliminary Product Preview
0423H—07/03/03
Byte 0: Output Control
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B0
3
,
9
21
8
C
K
L
C
,
8
T
K
L
C
6
t
i
B6
2
,
7
21
9
C
K
L
C
,
9
T
K
L
C
5
t
i
B-
0
d
e
v
r
e
s
e
R
4
t
i
B-
0
*
d
e
v
r
e
s
e
R
3
t
i
B-
0
*
d
e
v
r
e
s
e
R
2
t
i
B-
0
d
e
v
r
e
s
e
R
1
t
i
B-
0
d
e
v
r
e
s
e
R
0
t
i
B-
0
d
e
v
r
e
s
e
R
Byte 1: Output Control
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B-
1
d
e
v
r
e
s
e
R
6
t
i
B-
1
d
e
v
r
e
s
e
R
5
t
i
B-
1
d
e
v
r
e
s
e
R
4
t
i
B-
1
d
e
v
r
e
s
e
R
3
t
i
B-
1
d
e
v
r
e
s
e
R
2
t
i
B-
1
d
e
v
r
e
s
e
R
1
t
i
B-
1
d
e
v
r
e
s
e
R
0
t
i
B-
1
d
e
v
r
e
s
e
R
Byte 3: Reserved
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B-
1
d
e
v
r
e
s
e
R
6
t
i
B-
1
d
e
v
r
e
s
e
R
5
t
i
B-
1
d
e
v
r
e
s
e
R
4
t
i
B-
1
d
e
v
r
e
s
e
R
3
t
i
B-
1
d
e
v
r
e
s
e
R
2
t
i
B-
1
d
e
v
r
e
s
e
R
1
t
i
B-
1
d
e
v
r
e
s
e
R
0
t
i
B-
1
d
e
v
r
e
s
e
R
Byte 4: Reserved
(1= enable, 0 = disable)
Byte 2: Reserved
(1= enable, 0 = disable)
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B-
1
d
e
v
r
e
s
e
R
6
t
i
B-
1
d
e
v
r
e
s
e
R
5
t
i
B-
1
d
e
v
r
e
s
e
R
4
t
i
B-
1
d
e
v
r
e
s
e
R
3
t
i
B-
1
d
e
v
r
e
s
e
R
2
t
i
B-
1
d
e
v
r
e
s
e
R
1
t
i
B-
1
d
e
v
r
e
s
e
R
0
t
i
B-
1
d
e
v
r
e
s
e
R
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
6
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
5
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
4
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
3
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
2
t
i
B-
1
)
e
t
o
N
(
d
e
v
r
e
s
e
R
1
t
i
B-
1
)
e
t
o
N
(
d
e
v
r
e
s
e
R
0
t
i
B-
0
)
e
t
o
N
(
d
e
v
r
e
s
e
R
Byte 5: Reserved
(1= enable, 0 = disable)
Note: Don’t write into this register, writing into this
register can cause malfunction
T
I
B#
N
I
PD
W
PN
O
I
T
P
I
R
C
S
E
D
7
t
i
B2
,
31
0
C
K
L
C
,
0
T
K
L
C
6
t
i
B6
,
51
1
C
K
L
C
,
1
T
K
L
C
5
t
i
B9
,
0
11
2
C
K
L
C
,
2
T
K
L
C
4
t
i
B9
1
,
0
21
3
C
K
L
C
,
3
T
K
L
C
3
t
i
B3
2
,
2
21
4
C
K
L
C
,
4
T
K
L
C
2
t
i
B7
4
,
6
41
5
C
K
L
C
,
5
T
K
L
C
1
t
i
B3
4
,
4
41
6
C
K
L
C
,
6
T
K
L
C
0
t
i
B0
4
,
9
31
7
C
K
L
C
,
7
T
K
L
C
* Note: Do not change this bit value.
相關(guān)PDF資料
PDF描述
93V855AGLFT 93V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
93V855AGLF 93V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
93V855AG 93V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
93V855AGI 93V SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28
93V857BG-025LF-T 93V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
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