2000 Nov 17
16
Philips Semiconductors
Preliminary specication
1394 SBP-2 link layer controller
SAA7356HL
Table 8
Denition of the InterruptReason, InterruptEnable and InterruptSet register elds
MNEMONIC
VALUE
COMMENT
CmdClr
0
default condition: no action occurred
1
the SAA7356HL device has acknowledged the write to the CmdFromMicro register
BusReset
0
default condition: no action occurred
1
the SAA7356HL has detected a serial bus reset
CmdMicro
0
default condition: no action occurred
1
the SAA7356HL has written a command into the CmdToMicro register
Reserved
X
reserved and set to zero
8.4
RAM access for parameter passing
Within the SAA7356HL there is a 16 kbyte RAM. This is
shared between: the IEEE1394 transaction FIFOs,
the code for the automation engine and its local storage
requirements, and the shared memory area for
communications with the microcontroller.
The SAA7356HL user must understand how this shared
memory is accessed in order to write and read the
communications parameters. Each of the read and write
accesses to the FIFOs are byte-wide and the offset
addresses are byte offsets.
8.4.1
REGISTER ACCESS
The RAM can be directly accessed to upload the code into
the SAA7356HL. The C-structure for the registers for the
RAM access is shown below.
struct RAM {
U16; offset; // absolute offset into the RAM
U8; next; // read/write data at offset and
post-increment
U8; current; // read/write data at offset
};
The RAM.Offset field allows the microcontroller to access
anywhere within the SAA7356HL RAM. The RAM.Next
accesses will access the RAM.Offset address and
post-increment the offset pointer.
Accesses to the RAM.Current address allow reads and
writes to the data in the RAM.Offset location without
altering the RAM.Offset address.
The ability to write to anywhere within the RAM is used for
the power-on sequence.
8.4.2
REGISTER DEFINITIONS FOR THE REGISTER ACCESS
METHOD
This section defines the register structure for the RAM
registers.
The RAM.Offset registers are used to index into the RAM
inside the SAA7356HL. The index is a byte address. The
RAM.Offset register definition is shown in Table 9.
The RAM.Next register is used to read or write to the RAM
location addressed by the RAM.Offset register. Once an
access has been made, the value of the RAM.Offset
register is incremented to simplify the process of reading
or writing contiguous memory areas. The RAM.Next
register definition is shown in Table 10.
The RAM.Current register is used to read or write to the
RAM location addressed by the RAM.Offset register.
Once an access has been made there is no change to the
RAM.Offset register. The RAM.Current register definition
is shown in Table 11.