參數(shù)資料
型號: 935267395518
廠商: NXP SEMICONDUCTORS
元件分類: 顏色信號轉換
英文描述: COLOR SIGNAL DECODER, PBGA156
封裝: 15 X 15 MM, 1.15 MM HEIGHT, PLASTIC, MS-034, SOT-472-1, BGA-156
文件頁數(shù): 118/178頁
文件大?。?/td> 988K
代理商: 935267395518
2004 Jul 22
44
Philips Semiconductors
Product specication
Multistandard video decoder with adaptive
comb lter and component video input
SAA7118
Fig.28 Vertical timing diagram for 50 Hz/625 line systems.
(1) The inactive going edge of the V123 signal indicates whether the field is odd or even. If HREF is active during
the falling edge of V123, the field is ODD (field 1). If HREF is inactive during the falling edge of V123, the field
is EVEN. The specific position of the slope is dependent on the internal processing delay and may change a
few clock cycles from version to version.
The control signals listed above are available on pins RTS0, RTS1, XRH and XRV according to the following table:
For further information see Section 15.2: Tables 57, 58 and 59.
NAME
RTS0
RTS1
XRH
XRV
HREF
X
F_ITU656
X
V123
X
X
VGATE
X
FID
X
MHB540
VGATE
VSTO[8:0] = 134H
VSTA[8:0] = 15H
(a) 1st field
CVBS
ITU counting
single field counting
1
2
3
4
5
6
7
...
22
625
312
624
311
623
310
622
309
23
FID
HREF
F_ITU656
V123(1)
VGATE
CVBS
ITU counting
single field counting
FID
HREF
F_ITU656
V123(1)
VSTO[8:0] = 134H
VSTA[8:0] = 15H
(b) 2nd field
313
314
1
315
2
316
3
317
4
318
5
319
6
...
335
22
312
311
310
309
336
23
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