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參數(shù)資料
| 型號(hào)： | 935265482112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 門電路 |
| 英文描述： | LVC/LCX/Z SERIES, HEX 1-INPUT NON-INVERT GATE, PDSO14 |
| 封裝： | 4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP-14 |
| 文件頁數(shù)： | 9/19頁 |
| 文件大?。?/td> | 149K |
| 代理商： | 935265482112 |
Philips Semiconductors - PIP - 74LVC07A; Hex buffer with open-drain outputs
Product Information
74LVC07A; Hex
buffer with open-
drain outputs
Information as of 2003-04-22
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Applications
Block diagram
topGeneral description
The 74LVC07A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced
CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. This feature allows the use of
these devices as translators in a mixed 3.3 to 5 V environment.
The 74LVC07A provides six non-inverting buffers.
The outputs of the 74LVC07A are open drain and can be connected to other open-drain outputs to implement active-
LOW wired-OR or active-HIGH wired-AND functions.
topFeatures
q
5 V tolerant inputs and outputs (open drain) for interfacing with 5 V logic
q
Wide supply voltage range from 1.65 to 5.5 V
q
CMOS low power consumption
q
Direct interface with TTL levels
q
Inputs accept voltages up to 5 V
q
Complies with JEDEC standard no. 8-1A
q
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
topDatasheet
Page
count
File size
(kB)
Datasheet
74LVC07A
Hex buffer
with open-
drain outputs
2/25/2003
Product specification 16
86
file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/74LVC07AD.html (1 of 3) [May-12-2003 12:33:29 PM]
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| 935265481118 | LVC/LCX/Z SERIES, HEX 1-INPUT NON-INVERT GATE, PDSO14 |
| 935265482118 | LVC/LCX/Z SERIES, HEX 1-INPUT NON-INVERT GATE, PDSO14 |
| 935265481112 | LVC/LCX/Z SERIES, HEX 1-INPUT NON-INVERT GATE, PDSO14 |
| 935265483118 | AVC SERIES, 16 1-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 935265483112 | AVC SERIES, 16 1-BIT DRIVER, TRUE OUTPUT, PDSO48 |
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