
Go to Philips Semiconductors' home page
Select & Go...
Start
part
Catalog & Datasheets
Catalog by Function
Discrete semiconductors
Audio
Clocks and Watches
Data communications
Microcontrollers
Peripherals
Standard analog
Video
Wired communications
Wireless communications
Catalog by System
Automotive
Consumer Multimedia
Systems
Communications
PC/PC-peripherals
Cross reference
Models
Packages
Application notes
Selection guides
Other technical documentation
End of Life information
Datahandbook system
Relevant Links
About catalog tree
About search
About this site
Subscribe to eNews
Catalog & Datasheets
Search
VES1993
Information as of 2000-08-17
VES1993; Single Chip Satellite Channel Receiver
The VES 1993 is a single-chip channel receiver for satellite television reception which matches both DSS and DVB-S standards. The
device contains a dual 6-bit flash analog to digital converter, variable rate BPSK/QPSK coherent demodulator and Forward Error Correction
functions.The ADCs directly interface with I and Q analog baseband signals. After A to D conversion, the VES 1993 implements a bank of
cascadable filters as well as antialias and half-Nyquist filters. Analog AGC signal is generated by an amplitude estimation function. The
VES 1993 performs clock recovery at twice the Baud rate and achieves coherent demodulation without any feedback to the local oscillator.
Forward Error Correction is built around two error correcting codes : a Reed-Solomon (outer code), and a Viterbi decoder (inner code). The
Reed-Solomon decoder corrects up to 8 erroneous bytes among the N bytes of one data packet. Convolutional deinterleaver is located
between the Viterbi output and the R.S. decoder input. De-interleaver and R.S. decoder are automatically synchronized thanks to the frame
synchronisation algorithm which uses the sync pattern present in each packet. The VES 1993 is controlled via an I2C bus interface. The
circuit operates up to 91MHz and can process variable modulation rates, up to 45Mbaud.
The VES 1993 provides an interrupt line which can be programmed on either events or timing information.
Designed in 0.35 CMOS technology and housed in a 100-MQFP package, the VES 1993 operates over the commercial temperature range.
l
DSS and DVB-S compatible single chip demodulator & forward error correction.
l
Dual 6-bit ADC on chip.
l
PLL for crystal frequency multiplication.
l
Variable rate BPSK/QPSK coherent demodulator.
l
Modulation rate from 1 to 45MBaud.
l
Automatic Gain Control output.
l
Digital symbol timing recovery :
Acquisition range up to +- 240ppm
l
Digital carrier recovery :
Acquisition range up to +- 12pct of symbol rate
Description
Features
Applications
Datasheet
Products, packages, availability and ordering
Find similar products
To be kept informed on VES1993,
subscribe to eNews.
Subscribe
to eNews
Description
Features