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參數(shù)資料
| 型號(hào)： | 935264539557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | SOT-317, MQFP-100 |
| 文件頁(yè)數(shù)： | 2/19頁(yè) |
| 文件大?。?/td> | 162K |
| 代理商： | 935264539557 |
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1999 Jan 01
10
Philips Semiconductors
Product specication
Single Chip Satellite Channel Receiver
VES1993
Symbol
Pin Number
Type
Description
SCL_0
28
O
5V
This output is equivalent to the SCL input, but can be tristated by I2C
programmation. A pull-up resistor (typically 22K
) must be connected
between this pin and VCC.
SDA_0
29
I/O
5V
This signal is equivalent to the SDA I/O of the VES 1993 but can be
tristated by I2C programmation. SDA_0 is bidirectionnal. A pull-up
resistor (typically 22K
) must be connected between this pin and VCC.
TO[7:0]
53,55,59,62,
66,69,75,77
O
3.3V
TO[7:0] is a dedicated Test output bus used to test the VES 1993. In
normal mode of operation, these 8 outputs are set to 0.*
INT
79
O
5V
INTerrupt line output. This active low output interrupt line can be
configured by the I2C interface. INT is an open drain output and
therefore requires an external pull-up resistor to either VDD or VCC.
22K_0
82
O
5V
This output pin provides the 22KHz used to control the antena LNB. This
output is controlled via the I2C interface.
XINDIV
26
O
5V
This clock output pin is a division of the crystal frequency by a factor
programmable from 1 to 15 through the I2C interface (index 39).
PWMO
25
O
5V
This output pin is a programmable PWM signal. It can be used as an
analog control signal, which value can be programmed through the I2C
interface (index 38). The maximum frequency on VAGC output is
SACLK / 8.
IDDQ
30
I
Test input pin. Must be grounded.
GND
1,13,24,34,
47,50,63,70,
83,93,95
I
Digital ground voltage.
VDD
2,14,23,35,
48,49,61,71,
81,94,98
I
Digital 3.3V supply voltage.
VCC
22, 91
I
Digital 5V supply voltage.
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