- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄36339 > 935264533557 (NXP SEMICONDUCTORS) SPECIALTY CONSUMER CIRCUIT, PQFP100 PDF資料下載
參數(shù)資料
| 型號： | 935264533557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | SOT-317, MQFP-100 |
| 文件頁數(shù)： | 16/43頁 |
| 文件大?。?/td> | 254K |
| 代理商： | 935264533557 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁
1999 March 01
23
Philips Semiconductors
Product specication
Single chip DVB-C channel receiver
VES1820X
ENADAPT
When ENADAPT is set to 0, the adaptation algorithm is inhibited. The equalizer is
running with the current value of the coefficients. When ENADAPT=1 (default), the
coefficients of the equalizer are continuously adjusted.
ENEQUAL
When ENEQUAL=0, the equalization function is inhibited. The equalizer
coefficients are fixed to their initialization values. The default is ENEQUAL = 1.
DFE
DFE determines wether the equalizer is configured as a linear transversal
equalizer (DFE=0) or a decision feedback equalizer (DFE=1, default).
8. EQSTEP
07
16
READ/WRITE
EQST1[2:0]
EQST1[2:0] sets the convergence step of the adaptation algorithm during the
acquisition phase. The higher EQST1[2:0] is, the higher the step is. Default value
is 2.
EQST2[2:0]
EQST2[2:0] sets the convergence step of the adaptation algorithm during the
tracking phase.The higher EQST2[2:0] is, the higher the step is. Default value is 3.
9. MSETH
08
16
READ/WRITE
MSETH[7:0] MSETH[7:0] is the threshold value used to switch from the acquisition phase to the
tracking phase. MSETH[7:0] must be set as follows (decimal values) :
MSETH[7:0]
Modulation
162
16-QAM
116
32-QAM
67
64-QAM (default)
52
128-QAM
35
256-QAM
10. AREF
09
16
READ/WRITE
AREF[7:0]
AREF[7:0] is a reference parameter that optimizes the equalizer convergence
during the acquisition phase. AREF[7:0] must be set as follows (decimal values) :
AREF[7:0]
Modulation
145
16-QAM
150
32-QAM
106
64-QAM (default)
126
128-QAM
107
256-QAM
11. BDR_LSB
0A
16
READ/WRITE
BDR_LSB
8 LSB bits : BDR[7:0] of the BAUD rate frequency to program.
12. BDR_MID
0B
16
READ/WRITE
BDR_MID
8 MID bits : BDR[15:8] of the BAUD rate frequency to program.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 935264539557 | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 935266871557 | SPECIALTY CONSUMER CIRCUIT, PBGA292 |
| 935266917557 | SPECIALTY CONSUMER CIRCUIT, PBGA292 |
| 935268386557 | SPECIALTY CONSUMER CIRCUIT, PBGA292 |
| 935267050025 | SPECIALTY CONSUMER CIRCUIT, UUC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 935267356112 | 制造商:NXP Semiconductors 功能描述:IC TEA1507PN |
| 935268081112 | 制造商:NXP Semiconductors 功能描述:SUB ONLY IC |
| 935268721125 | 制造商:NXP Semiconductors 功能描述:Buffer/Line Driver 1-CH Non-Inverting 3-ST CMOS 5-Pin TSSOP T/R |
| 935269304128 | 制造商:ST-Ericsson 功能描述:IC AUDIO CODEC W/TCH SCRN 48LQFP |
| 935269544557 | 制造商:NXP Semiconductors 功能描述:SUB ONLY TDA9587-2US1-V1.3 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。