參數(shù)資料
型號(hào)： 935264533557
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝： SOT-317, MQFP-100
文件頁(yè)數(shù)： 11/43頁(yè)
文件大?。?/td> 254K
代理商： 935264533557
1999 March 01
19
Philips Semiconductors
Product specication
Single chip DVB-C channel receiver
VES1820X
TABLE 5 : MICROCONTROLLER INTERFACE REGISTERS
PARAMETER
INDEX
7(MSB)
6
5
4
3
2
1
0(LSB)
R/W
HEXA
CONF
00
STDBY
IFS
INVIQ
QAM[2]
QAM[1]
QAM[0]
TRI
CLB
R/W
AGCREF
01
AGCR[7]
AGCR[6]
AGCR[5]
AGCR[4]
AGCR[3]
AGCR[2]
AGCR[1]
AGCR[0]
R/W
AGCCONF
02
FELPWM
ADCSEL
0
1
SELAGC
PWMA
KAGC[1]
KAGC[0]
R/W
CLKCONF
03
NDEC[1]
NDEC[0]
GAIN2
GAIN3
DYN
CLK_C[2]
CLK_C[1]
CLK_C[0]
R/W
CARCONF
04
0
CAR_P[2]
CAR_P[1]
CAR_P[0]
CAR_C[3]
CAR_C[2]
CAR_C[1]
CAR_C[0]
R/W
LOCKTHR
05
LTHR[7]
LTHR[6]
LTHR[5]
LTHR[4]
LTHR[3]
LTHR[2]
LTHR[1]
LTHR[0]
R/W
EQCONF1
06
POSI[2]
POSI[1]
POSI[0]
VALI
ENADAPT
ENEQUAL
DFE
R/W
EQSTEP
07
EQST2[2]
EQST2[1]
EQST2[0]
EQST1[2]
EQST1[1]
EQST1[0]
R/W
MSETH
08
MSETH[7]
MSETH[6]
MSETH[5]
MSETH[4]
MSETH[3]
MSETH[2]
MSETH[1]
MSETH[0]
R/W
AREF
09
AREF[7]
AREF[6]
AREF[5]
AREF[4]
AREF[3]
AREF[2]
AREF[1]
AREF[0]
R/W
BDR_LSB
0A
BDR7
BDR[6]
BDR5
BDR4
BDR3
BDR2
BDR1
BDR0
R/W
BDR_MID
0B
BDR15
BDR14
BDR13
BDR12
BDR11
BDR10
BDR9
BDR8
R/W
BDR_MSB
0C
BDR21
BDR20
BDR19
BDR18
BDR17
BDR16
R/W
BDR_INV
0D
BDR17
BDR16
BDR15
BDR14
BDR13
BDR12
BDR11
BDR10
R/W
GAIN
0E
GNYQ[2]
GNYQ[1]
GNYQ[0]
SFIL
GLPF[1]
GLPF[0]
SSAT[1]
SSAT[0]
R/W
TEST
0F
BYPIIC
CTRL2
0
SELOUT[1]
SELOUT[0]
0
R/W
RSCONF
10
PVBER[1]
PVBER[0]
CLB_UNC
C[1]
C[0]
RSI
DESCI
IEI
R/W
SYNC
11
NODVB
BER[1]
BER[0]
FEL
FSYNC
CARLOCK
EQ_ALGO
R
POLA
12
1
POINT
P/MF
PFEL
PPSYNC
PUNCOR
PDEN
POCLK
R/W
CPT_UNCOR
13
CPTU[6]
CPTU[5]
CPTU[4]
CPTU[3]
CPTU[2]
CPTU[1]
CPTU[0]
R
BER_LSB
14
BER[7]
BER[6]
BER[5]
BER[4]
BER[3]
BER[2]
BER[1]
BER[0]
R
BER_MID
15
BER[15]
BER[14]
BER[13]
BER[12]
BER[11]
BER[10]
BER[9]
BER[8]
R
BER_MSB
16
BER[19]
BER[18]
BER[17]
BER[16]
R
VAGC
17
AGC[7]
AGC[6]
AGC[5]
AGC[4]
AGC[3]
AGC[2]
AGC[1]
AGC[0]
R
MSE
18
MSE[7]
MSE[6]
MSE[5]
MSE[4]
MSE[3]
MSE[2]
MSE[1]
MSE[0]
R
VAFC
19
VAFC[7]
VAFC[6]
VAFC[5]
VAFC[4]
VAFC[3]
VAFC[2]
VAFC[1]
VAFC[0]
R
IDENTITY
1A
0
1
0
1
R
ADC
1B
0
PDOWN
PCLK
R/W
EQCONF2
1C
SGNALGO
CTPHASE
CTADAPT
STEPTL[2]
STEPTL[1]
STEPTL[0]
R/W
CKOFFSET
1D
CKOFF[7]
CKOFF[6]
CKOFF[5]
CKOFF[4]
CKOFF[3]
CKOFF[2]
CKOFF[1]
CKOFF[0]
R
PLL
1E
OOLN
OOLCLRN
BYPPLL
PDPLL
DIVSEL[2]
DIVSEL[1]
DIVSEL[0]
R/W
SERINT
20
DIV[3]
DIV[2]
DIV[1]
DIV[0]
PARMOD
SWAP
MSBFIRST
INTSEL
R/W
SATNYQ
21
SATNYQ[7]
SATNYQ[6]
SATNYQ[5]
SATNYQ[4]
SATNYQ[3]
SATNYQ[2]
SATNYQ[1]
SATNYQ[0]
R
SATADC
22
SATADC[7]
SATADC[6]
SATADC[5]
SATADC[4]
SATADC[3]
SATADC[2]
SATADC[1]
SATADC[0]
R
HALFADC
23
HLFADC[7]
HLFADC[6]
HLFADC[5]
HLFADC[4]
HLFADC[3]
HLFADC[2]
HLFADC[1]
HLFADC[0]
R
SATDEC1
24
SDEC1[7]
SDEC1[6]
SDEC1[5]
SDEC1[4]
SDEC1[3]
SDEC1[2]
SDEC1[1]
SDEC1[0]
R
SATDEC2
25
SDEC2[7]
SDEC2[6]
SDEC2[5]
SDEC2[4]
SDEC2[3]
SDEC2[2]
SDEC2[1]
SDEC2[0]
R
SATDEC3
26
SDEC3[7]
SDEC3[6]
SDEC3[5]
SDEC3[4]
SDEC3[3]
SDEC3[2]
SDEC3[1]
R
SATAAF
27
SAAF[7]
SAAF[6]
SAAF[5]
SAAF[4]
SAAF[3]
SAAF[2]
SAAF[1]
SAAF[0]
R
SATTHR
30
STHR[7]
STHR[6]
STHR[5]
STHR[4]
STHR[3]
STHR[2]
STHR[1]
STHR[0]
R/W
HALFTHR
31
HLFTHR[7]
HLFTHR[6]
HLFTHR[5]
HLFTHR[4]
HLFTHR[3]
HLFTHR[2]
HLFTHR[1]
HLFTHR[0]
R/W
ITSEL
32
ITEN
ITSEL[6]
ITSEL[5]
ITSEL[4]
ITSEL[3]
ITSEL[2]
ITSEL[1]
ITSEL[0]
R/W
ITSTAT
33
ITSTAT[6]
ITSTAT[5]
ITSTAT[4]
ITSTAT[3]
ITSTAT[2]
ITSTAT[1]
ITSTAT[0]
R
PWMREF
34
PWMR[7]
PWMR[6]
PWMR[5]
PWMR[4]
PWMR[3]
PWMR[2]
PWMR[1]
PWMR[0]
R/W
LEGEND :
DEFAULT STATE = 0
DEFAULT STATE = 1
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