參數(shù)資料
型號(hào): 935263448518
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 無(wú)繩電話(huà)/電話(huà)
英文描述: SPEAKER PHONE CIRCUIT, PQFP44
封裝: PLASTIC, SOT-307, QFP-44
文件頁(yè)數(shù): 5/43頁(yè)
文件大?。?/td> 237K
代理商: 935263448518
1999 Oct 14
13
Philips Semiconductors
Product specication
Speech and handsfree IC
TEA1098
LOUDSPEAKER CHANNEL
Loudspeaker amplier: pins HFRX, GALS and LSAO
The TEA1098 loudspeaker amplifier has an asymmetrical
input with an input resistance of 20 k
between pins HFRX
and GND. It is biased at a voltage of two diodes. Without
output limitation, the input stage can accept signals of up
to 580 mV (RMS) at 2% THD (room temperature).
The gain of the input stage varies according to the
TEA1098 mode. In Rx mode, it has maximum gain; in
Tx mode, it has minimum gain and in Idle mode, it is
halfway between maximum and minimum gain.
Switch-over from one mode to the other is smooth and
click-free. The rail-to-rail output stage is designed to power
a loudspeaker connected as a single-ended load (between
pins LSAO and GND).
In Rx mode, the overall gain of the loudspeaker amplifier
can be adjusted from 0 up to 35 dB to suit specific
application requirements. The gain from pin HFRX to pin
LSAO is proportional to the value of RGALS and is 28 dB
when RGALS is 255 k. It is recommended that a capacitor
is connected in parallel with RGALS to provide a first-order
low-pass filter.
Volume control: pin VOL
The loudspeaker amplifier gain can be adjusted by the
potentiometer RVOL. For logarithmic gain control, a linear
potentiometer can be used. Each 1.9 k
increase of RVOL
results in a gain loss of 3 dB. The maximum gain reduction
using the volume control is internally limited to the
switching range (see Fig.9).
handbook, full pagewidth
MGL343
DYNAMIC
LIMITER
VOLUME
CONTROL
I
V
I
DLC
LSAO
GALS
VOL
HFRX
14
(11)
15
(12)
12
(8)
5
(1)
26
(23)
VBB
RGALS
CGALS
CLSAO
CDLC
RVOL
to
logic
to/from
voice switch
to
envelope
detector
Fig.9 Loudspeaker channel.
Pin numbers in parenthesis apply to the TEA1098H. Pin numbers not in parenthesis apply to the TEA1098TV.
Dynamic limiter: pin DLC
The TEA1098 dynamic limiter prevents clipping of the
loudspeaker output stage and protects the operation of the
circuit when the supply voltage at VBB falls below 2.7 V.
Hard clipping of the loudspeaker output stage is prevented
by rapidly reducing the gain when the output stage starts
to saturate. The time taken to effect gain reduction
(clipping attack time) is approximately a few milliseconds.
The circuit stays in the reduced gain mode until the peaks
of the loudspeaker signals no longer cause saturation.
The gain of the loudspeaker amplifier then returns to its
normal value within the clipping release time (typically
250 ms). Both attack and release times are proportional to
the value of the capacitor CDLC.
The total harmonic distortion of the loudspeaker output
stage, in reduced gain mode, stays below 2% up to 10 dB
(minimum) of input voltage overdrive [providing VHFRX is
below 580 mV (RMS)].
When the supply voltage falls below an internal threshold
voltage of 2.7 V, the gain of the loudspeaker amplifier is
reduced rapidly (approximately 1 ms). When the supply
voltage rises above 2.7 V, the gain of the loudspeaker
amplifier is increased. By forcing a level lower than 0.2 V
on pin DLC, the loudspeaker amplifier is muted and the
TEA1098 is automatically forced into the Tx mode.
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