參數(shù)資料
型號: 935263156557
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, QFP-80
文件頁數(shù): 10/76頁
文件大小: 567K
代理商: 935263156557
Philips Semiconductors
Product specification
P83C557E4/P80C557E4/P89C557E4
Single-chip 8-bit microcontroller
1999 Mar 02
18
Figure 15. Functional diagram of AD converter.
+
88
8
2
10
COMPARATOR
SAR
DAC
8x
10–bit result
registers
SCAN LOGIC
ADPSS
ADCON
2 LATCHES
Read
ADRSH
Read
ADRSLn
ANALOG
Mux.
ADC0
ADC7
AVref+
AVref–
AVDD1
AVSS1
ADEXS
INTERNAL BUS
Table 10.
Description of ADCON bits
SYMBOL
BIT
FUNCTION
ADCON.7
ADPR1
Control bit for the prescaler.
ADCON.6
ADPR0
Control bit for the prescaler.
ADPR1=0 ADPR0=0 Prescaler divides by 2 (default by reset)
ADPR1=0 ADPR0=1 Prescaler divides by 4
ADPR1=1 ADPR0=0 Prescaler divides by 6
ADPR1=1 ADPR0=1 Prescaler divides by 8
ADCON.5
ADPOS
ADPOS is reserved for future use. Must be ’0’ if ADCON is written.
ADCON.4
ADINT
ADC interrupt flag. This flag is set when all selected analog inputs are converted, as well in continuous
scan as in one-time scan mode. An interrupt is invoked if this interrupt is enabled. ADINT must be cleared
by software. It cannot be set by software.
ADCON.3
ADSST
ADC start and status. Setting this bit by software or by hardware (via ADEXS input) starts the A/D
conversion of the selected analog inputs. ADSST stays a ‘one’ in continuous scan mode. In one-time scan
mode, ADSST is cleared by hardware when the last selected analog input channel has been converted. As
long as ADSST is ’1’, new start commands to the ADC-block are ignored.
An A/D conversion in progress is aborted if ADSST is cleared by software.
ADCON.2
ADCSA
1
=
Continuous scan of the selected analog inputs after a start of an A/D conversion.
0
=
One-time scan of the selected analog inputs after a start of an A/D conversion.
ADCON.1
ADSRE
1
=
A rising edge at input ADEXS will start the A/D conversion and generate a capture signal.
0
=
A rising edge at input ADEXS has no effect.
ADCON.0
ADSFE
1
=
A falling edge at input ADEXS will start the A/D conversion and generate a capture signal.
0
=
A falling edge at input ADEXS has no effect.
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