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參數(shù)資料
| 型號(hào)： | 935262451557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顏色信號(hào)轉(zhuǎn)換 |
| 英文描述： | COLOR SIGNAL DECODER, PQFP100 |
| 封裝： | 14 X 14 X 1.40 MM, PLASTIC, SOT-407, LQFP-100 |
| 文件頁(yè)數(shù)： | 103/144頁(yè) |
| 文件大?。?/td> | 592K |
| 代理商： | 935262451557 |
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2000 Mar 15
61
Philips Semiconductors
Preliminary specication
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC
comb lter, VBI-data slicer and high performance scaler
SAA7114H
9.3
Clock and real-time synchronization signals
For the generation of the line-locked video (pixel) clock
LLC, and of the frame locked audio serial bit clock, a
crystal accurate frequency reference is required. An
oscillator is built in, for fundamental or third harmonic
crystals. The supported crystal frequencies are 32.11 or
24.576 MHz (defined during reset by strapping
pin ALRCLK).
Alternatively pin XTALI can be driven from an external
single ended oscillator.
The crystal oscillation can be propagated as clock to other
ICs in the system via pin XOUT.
The Line-Locked Clock (LLC) is the double pixel clock of
nominal 27 MHz. It is locked to the selected video input,
generating baseband video pixels according to
“ITU
recommendation 601”. In order to support interfacing
circuitries, a direct pixel clock LLC2 is also provided.
The pins for line and field timing reference signals are
RTCO, RTS1 and RTS0. Various real-time status
information can be selected for the RTS pins. The signals
are always available (output) and reflect the
synchronization operation of the decoder part in the
SAA7114H. The function of the RTS1 and RTS0 pins can
be defined by bits RTSE1[3:0]12H[7:4] and
RTSE0[3:0]12H[3:0].
Table 25 Clock and real-time synchronization signals
SYMBOL PIN I/O
DESCRIPTION
BIT
Crystal oscillator
XTALI
7
I
input for crystal oscillator, or reference clock
XTALO
6
O
output of crystal oscillator
XOUT
4
O
reference (crystal) clock output drive (optional)
XTOUTE[14H[3]]
Real-time signals (RT port)
LLC
28
O
line-locked clock, nominal 27 MHz, double pixel clock locked to the
selected video input signal
LLC2
29
O
line-locked pixel clock, nominal 13.5 MHz
RTCO
36
O
real-time control output, transfers real-time status information
supporting RTC level 3.1 (see external document
“RTC Functional
Description”, available on request)
RTS0
34
O
real-time status information line 0, can be programmed to carry various
real-time informations (see Table 55)
RTSE0[3:0]12H[3:0]
RTS1
35
O
real-time status information line 1, can be programmed to carry various
real-time informations (see Table 56)
RTSE1[3:0]12H[7:4]
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