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參數(shù)資料
| 型號： | 935249730118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 計數(shù)器 |
| 英文描述： | 4000/14000/40000 SERIES, ASYN NEGATIVE EDGE TRIGGERED 12-BIT UP BINARY COUNTER, PDSO16 |
| 封裝： | PLASTIC, SOT-109, SO-16 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 42K |
| 代理商： | 935249730118 |
January 1995
3
Philips Semiconductors
Product specication
12-stage binary counter
HEF4040B
MSI
AC CHARACTERISTICS
VSS = 0 V; Tamb =25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL
MIN. TYP. MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
CP
→ O0
5
105
210
ns
78 ns
+ (0,55 ns/pF) CL
HIGH to LOW
10
tPHL
45
90
ns
34 ns
+ (0,23 ns/pF) CL
15
35
70
ns
27 ns
+ (0,16 ns/pF) CL
5
85
170
ns
58 ns
+ (0,55 ns/pF) CL
LOW to HIGH
10
tPLH
40
80
ns
29 ns
+ (0,23 ns/pF) CL
15
30
60
ns
22 ns
+ (0,16 ns/pF) CL
On → On + 1
5
35
70
ns
note 1
(0,55 ns/pF) CL
HIGH to LOW
10
tPHL
15
30
ns
note 1
(0,23 ns/pF) CL
15
10
20
ns
note 1
(0,16 ns/pF) CL
5
35
70
ns
note 1
(0,55 ns/pF) CL
LOW to HIGH
10
tPLH
15
30
ns
note 1
(0,23 ns/pF) CL
15
10
20
ns
note 1
(0,16 ns/pF) CL
MR
→ On
5
90
180
ns
63 ns
+ (0,55 ns/pF) CL
HIGH to LOW
10
tPHL
40
80
ns
29 ns
+ (0,23 ns/pF) CL
15
30
60
ns
22 ns
+ (0,16 ns/pF) CL
Output transition times
5
60
120
ns
10 ns
+ (1,0 ns/pF) CL
HIGH to LOW
10
tTHL
30
60
ns
9 ns
+ (0,42 ns/pF) CL
15
20
40
ns
6 ns
+ (0,28 ns/pF) CL
5
60
120
ns
10 ns
+ (1,0 ns/pF) CL
LOW to HIGH
10
tTLH
30
60
ns
9 ns
+ (0,42 ns/pF) CL
15
20
40
ns
6 ns
+ (0,28 ns/pF) CL
Fig.3 Logic diagram.
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