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參數資料
| 型號： | 934056845115 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 外設及接口 |
| 英文描述： | 1.3 A BUF OR INV BASED PRPHL DRVR, PDSO4 |
| 封裝： | PLASTIC, SC-73, SOT-223, 4 PIN |
| 文件頁數： | 7/11頁 |
| 文件大?。?/td> | 59K |
| 代理商： | 934056845115 |
Philips Semiconductors
Product specification
PowerMOS transistor
PIP3103-T
Logic level TOPFET
Fig.2. Normalised limiting power dissipation.
P
D% = 100PD/PD(25C) = f(Tmb)
Fig.3. Continuous drain current.
I
D = f(Tamb); condition: VIS = 5 V
Fig.4. Typical on-state characteristics, T
j = 25C.
I
D = f(VDS); parameter VIS; tp = 300 s
Fig.5. Normalised drain-source on-state resistance.
a = R
DS(ON)/RDS(ON)25C = f(Tj); ID = 100 mA; VIS = 4.4 V
Fig.6. Typical on-state resistance, T
j = 25C.
R
DS(ON) = f(VIS); conditions: ID = 100 mA, tp = 300 s
Fig.7. Typical transfer characteristics, T
j = 25C.
I
D = f(VIS); conditions: VDS = 10 V, tp = 300 s
Normalised Power Derating, PD (%)
0
10
20
30
40
50
60
70
80
90
100
0
25
50
75
100
125
150
Mounting Base temperature, Tmb (C)
0
0.5
1
1.5
2
-50
050
100
150
Normalised RDS(ON) = f(Tj)
a
Tj /
C
0
0.5
1.0
1.5
2.0
20
40
60
80
100
120
140
ID / A
Tamb / C
CURRENT LIMITING OCCURS
WITHIN SHADED REGION
TYP.
0
1
23
45
6
7
8
0
50
100
150
200
250
300
350
RDS(ON) / mOhm
VIS / V
TYP.
MAX.
0
20
0
0.5
1
1.5
2
ID / A
VDS / V
4
8
12
16
28
32
24
VIS / V =
6
7
4
5
0123
4
5
67
0
0.5
1
1.5
2
VIS / V
ID / A
June 2001
5
Rev 1.000
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