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參數(shù)資料
| 型號(hào)： | 934055819118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | 75 A, 55 V, 0.013 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | PLASTIC, DPAK-3 |
| 文件頁(yè)數(shù)： | 8/11頁(yè) |
| 文件大?。?/td> | 134K |
| 代理商： | 934055819118 |
Philips Semiconductors
Product specification
N-channel logic level TrenchMOS
transistor
PSMN010-55D
Fig.13. Typical turn-on gate-charge characteristics.
V
GS = f(QG)
Fig.14. Typical reverse diode current.
I
F = f(VSDS); conditions: VGS = 0 V; parameter Tj
Fig.15. Maximum permissible non-repetitive
avalanche current (I
AS) versus avalanche time (tAV);
unclamped inductive load
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
1020
3040506070
8090
100
Gate charge, QG (nC)
Gate-source voltage, VGS (V)
ID = 75 A
Tj = 25 C
VDD = 11 V
VDD = 44 V
1
10
100
0.001
0.01
0.1
1
10
Avalanche time, tAV (ms)
Maximum Avalanche Current, IAS (A)
Tj prior to avalanche = 150 C
25 C
0
5
10
15
20
25
30
35
40
45
50
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
Source-Drain Voltage, VSDS (V)
Source-Drain Diode Current, IF (A)
Tj = 25 C
175 C
VGS = 0 V
October 1999
6
Rev 1.200
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