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參數(shù)資料
| 型號： | 934055812127 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | 10.5 A, 30 V, 0.15 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | PLASTIC, SMD, SC-63, DPAK-3 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 105K |
| 代理商： | 934055812127 |
Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
PHB11N03LT, PHD11N03LT
Logic level FET
FEATURES
SYMBOL
QUICK REFERENCE DATA
’Trench’ technology
V
DSS = 30 V
Low on-state resistance
Fast switching
I
D = 10.5 A
Logic level compatible
R
DS(ON) ≤ 150 m (VGS = 5 V)
R
DS(ON) ≤ 130 m (VGS = 10 V)
GENERAL DESCRIPTION
N-channel enhancement mode, logic level, field-effect power transistor in a plastic envelope using ’trench’ technology.
Applications:-
d.c. to d.c. converters
switched mode power supplies
The PHB11N03LT is supplied in the SOT404 (D
2PAK) surface mounting package.
The PHD11N03LT is supplied in the SOT428 (DPAK) surface mounting package.
PINNING
SOT428 (DPAK)
SOT404 (D
2PAK)
PIN
DESCRIPTION
1
gate
2
drain
1
3
source
tab
drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DSS
Drain-source voltage
T
j = 25 C to 175C
-
30
V
DGR
Drain-gate voltage
T
j = 25 C to 175C; RGS = 20 k
-30
V
GS
Gate-source voltage
-
± 15
V
GSM
Pulsed gate-source voltage
-
± 20
V
I
D
Continuous drain current
T
mb = 25 C
-
10.3
A
T
mb = 100 C
-
7.3
A
I
DM
Pulsed drain current
T
mb = 25 C
-
41
A
P
D
Total power dissipation
T
mb = 25 C
-
33
W
T
j, Tstg
Operating junction and
- 55
175
C
storage temperature
d
g
s
13
tab
2
1
2
3
tab
1 It is not possible to make contact to pin 2 of the SOT404 or SOT428 package
September 1999
1
Rev 1.000
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