參數(shù)資料
型號(hào): 934055514115
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 外設(shè)及接口
英文描述: 1.3 A BUF OR INV BASED PRPHL DRVR, PDSO4
封裝: PLASTIC, SC-73, SOT-223, 4 PIN
文件頁(yè)數(shù): 6/9頁(yè)
文件大?。?/td> 66K
代理商: 934055514115
Philips Semiconductors
Product specification
PowerMOS transistor
BUK127-50DL
Logic level TOPFET
Fig.8. Typical overtemperature protection threshold.
T
j(TO) = f(VIS)
Fig.9. Typical DC input characteristics, T
j = 25C.
I
IS & IISL = f(VIS); normal operation & protection latched
Fig.10. Typical DC input currents.
I
IS & IISL = f(Tj); parameter VIS; normal & latched
Fig.11. Input threshold voltage.
V
IS(TO) = f(Tj); conditions: ID = 1 mA; VDS = 5 V
Fig.12. Typical input clamping characteristic.
I
I = f(VIS); normal operation, Tj = 25C.
Fig.13. Typical overload protection response time.
1 / t
dsc = f(PD); VIS ≥ 4 V, Tj ≤ 125C.
2345678
160
165
170
175
180
185
190
195
200
BUK127-50DL
Tj(TO) / C
VIS / V
DATA BELOW 4V IS FOR
INFORMATION ONLY.
ALL SPEC. VALUES ARE
AT 4V AND ABOVE.
FOR NORMAL OPERATION
-50
0
50
100
150
0
1
2
3
4
BUK127-50DL
VIS(TO) / V
Tj / C
TYP.
MIN.
MAX.
01
234
56
78
0
0.5
1
Vis / V
Ii / mA
Iisl
Iis
02
468
10
0
1
2
3
4
5
6
7
8
9
10
BUK127-50DL
II / mA
VIS / V
-50
0
50
100
150
0
100
200
300
400
500
BUK127-50DL
IIS & IISL / uA
Tj / C
= IIS
= IISL
5V
4V
3V
VIS / V =
010
20
30
50
0
200
400
600
800
1000
1200
1400
1600
1s / tdsc
Pd / W
BUK127-50DL
5
152535
40
45
October 2001
6
Rev 1.011
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