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參數(shù)資料
| 型號(hào)： | 933964690623 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 計(jì)數(shù)移位寄存器 |
| 英文描述： | F/FAST SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| 封裝： | 3.90 MM, PLASTIC, MS-012AC, SOT-109-1, SO-16 |
| 文件頁數(shù)： | 11/13頁 |
| 文件大小： | 109K |
| 代理商： | 933964690623 |
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
1990 Apr 18
7
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
VCC = +5V
Tamb = +25°C
CL = 50pF, RL = 500
VCC = +5V ± 10%
Tamb = 0°C to +70°C
CL = 50pF, RL = 500
UNIT
MIN
TYP
MAX
MIN
MAX
fMAX
Maximum clock frequency–SHCP to Qs
Waveform
NO TAG
115
135
90
MHz
tPLH
tPHL
Propagation delay
SHCP to Qs
Waveform
NO TAG
6.0
2.5
8.0
4.5
10.5
7.5
5.0
2.5
12.5
7.5
ns
tPLH
tPHL
Propagation delay
STCP to Q0–Q7
Waveform
NO TAG
5.5
3.0
8.0
5.0
10.0
8.0
4.5
3.0
13.0
8.5
ns
tPHL
Propagation delay
SHR to Qs
Waveform
NO TAG
3.5
5.5
8.0
3.0
8.5
ns
tPZH
tPZL
Output Enable time
OE to Q0–Q7
Waveform 5
Waveform 6
3.5
3.0
5.5
9.0
8.5
2.5
10.5
ns
tPHZ
tPLZ
Output Disable time
OE to Q0–Q7
Waveform 5
Waveform 6
2.0
4.0
6.0
7.0
9.0
1.5
3.0
8.5
10.5
ns
AC SETUP REQUIREMENTS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
VCC = +5V
Tamb = +25°C
CL = 50pF, RL = 500
VCC = +5V ± 10%
Tamb = 0°C to +70°C
CL = 50pF, RL = 500
UNIT
MIN
TYP
MAX
MIN
MAX
ts(H)
ts(L)
Setup time, High or Low
Ds to SHCP
Waveform 3
2.0
2.5
ns
th(H)
th(L)
Hold time, High or Low
Ds to SHCP
Waveform 3
0
ns
ts(L)
Setup time, Low
SHR to STCP
Waveform 3
4.5
5.0
ns
ts(H)
Setup time, High
SHCP to STCP
Waveform 4
4.5
5.0
ns
tW(H)
tW(L)
SHCP Pulse width,
High or Low
Waveform
NO TAG
3.5
4.0
ns
tW(H)
tW(L)
STCP Pulse width,
High or Low
Waveform
NO TAG
4.0
3.0
4.0
3.5
ns
tW(L)
SHR Pulse width, Low
Waveform
NO TAG
3.0
ns
tREC
Recovery time,
SHR to SHCP
Waveform
NO TAG
3.0
ns
AC WAVEFORMS
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
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