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參數(shù)資料
| 型號(hào)： | 933794820602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 計(jì)數(shù)器 |
| 英文描述： | F/FAST SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, SOT-38-4, DIP-16 |
| 文件頁(yè)數(shù)： | 10/12頁(yè) |
| 文件大?。?/td> | 104K |
| 代理商： | 933794820602 |
Philips Semiconductors
Product specification
74F193
Up/down binary counter with separate up/down clocks
1995 Jul 17
7
AC WAVEFORMS
For all waveforms Vm = 1.5V
VM
tPLH
tPHL
VM
CPU, CPD
Qn
1/fMAX
tW(L)
SF00750
tW(H)
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width and Maximum Clock Frequency
trec
VM
PL
tW(L)
VM
tPLH
tPHL
CPU, CPD
VM
TCU, TCD, Qn
SF00751
Waveform 3. Parallel Pulse Width,
Parallel Load to Output Delays, and Parallel Load
to Clock Recovery Time
VM
tPLH
MR
tW(H)
trec
VM
tPHL
CPU, CPD
Qn, TCD
TCU
SF00752
Waveform 5. Master Reset Pulse Width, Master Reset to Output
Delay and Master Reset to Clock Recovery Time
VM
tPLH
tPHL
CPU, CPD
TCU, TCD
SF00753
Waveform 2. Propagation Delay, Clock to Terminal Count
VM
tPHL
tPLH
VM
tPHL
tPLH
VM
Dn
Qn, TCU, TCD
SF00754
Waveform 4. Propagation Delay, Data to Flip-Flop Outputs,
Terminal Count Up and Down Outputs
VM
Dn
PL
tS(H)
th(H)
tS(L)
th(L)
VM
SF00755
The shaded areas indicate when the input is permitted
to change for predictable output performance.
Waveform 6. Data Setup and Hold Times
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