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參數(shù)資料
| 型號： | 9240LPRPQB |
| 廠商： | MAXWELL TECHNOLOGIES |
| 元件分類： | ADC |
| 英文描述： | 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QFP44 |
| 封裝： | RAD-PAK, QFP-44 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 189K |
| 代理商： | 9240LPRPQB |
Memory
4
All data sheets are subject to change without notice
2002 Maxwell Technologies
All rights reserved.
14-Bit, 10 MSPS Monolithic A/D Converter with LPT ASIC
9240LP
03.08.02 Rev 4
TABLE 4. 9240LP DC SPECIFICATIONS
(AVDD = 5V, DVDD = 5V, DRVDD = 5V, R
BIAS = 2 K, VREF = 2.5V,VINA = VINB =± 2.5V DIFFERENTIAL INPUT CENTERED ON VREF(1.25V
TO
3.75V ABSOLUTE), T
A = -55 TO +125°C, UNLESS OTHERWISE SPECIFIED)
PARAMETER
SUBGROUPS
MIN
TYP1
MAX
UNIT
RESOLUTION
1
14
--
Bits
MAX REFERRED NOISE1
V
REF = 1 V
V
REF = 2.5V
--
0.9
0.36
--
LSB rms
ACCURACY2
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
INL 3
DNL 3
No Missing Codes
Zero Error (@ 25 °C)
Gain Error (@ 25 °C) 4,1
Gain Error (@ 25 °C) 5
1, 2, 3
1
--
1
-3.0
--
.3
1.5
0.75
±2.5
±0.6
±2.5
±0.7
--
+3.0
±1.0
--
14
+.3
1.5
0.75
LSB
Bits Guaranteed
% FSR
TEMPERATURE DRIFT
Zero Error
Gain Error 4
Gain Error 5
1, 2, 3
--
3.0
20.0
5.0
--
ppm/°C
POWER SUPPLY REJECTION
1, 2, 3
--
±0.1
% FSR
ANALOG INPUT1
Input Span (with V
REF = 1.0 V)
1
(with V
REF = 2.5 V)
Input (V
INA or VINB) Range
Input Capacitance1
1, 2, 3
--
2
--
0
--
16
--
5
AVDD -.25
V p-p
V
pF
INTERNAL VOLTAGE REFERENCE1
Output Voltage (1V mode)
Output Voltage Tolerance (1 V Mode)
Output Voltage (2.5 V Mode)
Output Voltage Tolerance (2.5 V Mode)
Load Regulation V
REF
6
Load Regulation LPTV
REF
1, 6, 7
--
1
--
2.5
--
10
--
±14
--
±35
--
10.0
Volts
mV
Volts
mV
REFERENCE INPUT RESISTANCE
1, 2, 3
--
5
--
k
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