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參數(shù)資料
| 型號(hào)： | 8XL51FA |
| 廠商： | Intel Corp. |
| 英文描述： | LOW VOLTAGE CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLERS |
| 中文描述： | 低壓CHMOS單片8位微控制器 |
| 文件頁數(shù)： | 4/20頁 |
| 文件大小： | 285K |
| 代理商： | 8XL51FA |
8XL51FA/FB/FC
PIN DESCRIPTIONS
V
CC
: Supply voltage.
V
SS
: Circuit ground.
Port 0: Port 0 is an 8-bit, open drain, bidirectional I/O
port. As an output port each pin can sink several
inputs. Port 0 pins that have 1’s written to them float,
and in that state can be used as high-impedance
inputs.
Port 0 is also the multiplexed low-order address and
data bus during accesses to external Program and
Data Memory. In this application it uses strong inter-
nal pullups when emitting 1’s, and can source and
sink several inputs.
Port 0 also receives the code bytes during OTP
ROM programming, and outputs the code bytes dur-
ing program verification. External pullup resistors are
required during program verification.
Port 1: Port 1 is an 8-bit bidirectional I/O port with
internal pullups. The Port 1 output buffers can drive
several inputs. Port 1 pins that have 1’s written to
them are pulled high by the internal pullups, and in
that state can be used as inputs. As inputs, Port 1
pins that are externally pulled low will source current
(I
IL
, on the data sheet) because of the internal pull-
ups.
In addition, Port 1 serves the functions of the follow-
ing special features of the 8XL51FX:
Port Pin
Alternate Function
P1.0
T2 (External Count Input to Timer/
Counter 2), Clock Out
P1.1
T2EX (Timer/Counter 2 Capture/
Reload Trigger and Direction Control)
P1.2
ECI (External Count Input to the PCA)
P1.3
CEX0 (External I/O for Compare/
Capture Module 0)
P1.4
CEX1 (External I/O for Compare/
Capture Module 1)
P1.5
CEX2 (External I/O for Compare/
Capture Module 2)
P1.6
CEX3 (External I/O for Compare/
Capture Module 3)
P1.7
CEX4 (External I/O for Compare/
Capture Module 4)
Port 1 receives the low-order address bytes during
OTP ROM programming and verifying.
Port 2: Port 2 is an 8-bit bidirectional I/O port with
internal pullups. The Port 2 output buffers can drive
several inputs. Port 2 pins that have 1’s written to
them are pulled high by the internal pullups, and in
that state can be used as inputs. As inputs, Port 2
pins that are externally pulled low will source current
(I
IL
, on the data sheet) because of the internal pull-
ups.
Port 2 emits the high-order address byte during
fetches from external Program Memory and during
accesses to external Data Memory that use 16-bit
addresses (MOVX
uses strong internal pullups when emitting 1’s. Dur-
ing accesses to external Data Memory that use 8-bit
addresses (MOVX
@
Ri), Port 2 emits the contents of
the P2 Special Function Register.
@
DPTR). In this application it
Some Port 2 pins receive the high-order address bits
during OTP ROM programming and program verifi-
cation.
Port 3: Port 3 is an 8-bit bidirectional I/O port with
internal pullups. The Port 3 output buffers can drive
several inputs. Port 3 pins that have 1’s written to
them are pulled high by the internal pullups, and in
that state can be used as inputs. As inputs, Port 3
pins that are externally pulled low will source current
(I
IL
, on the data sheet) because of the pullups.
Port 3 also serves the functions of various special
features of the MCS 51 microcontroller family, as
listed below:
Port Pin
Alternate Function
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
RXD (serial input port)
TXD (serial output port)
INT0 (external interrupt 0)
INT1 (external interrupt 1)
T0 (Timer 0 external input)
T1 (Timer 1 external input)
WR (external data memory write strobe)
RD (external data memory read strobe)
RST: Reset input. A high on this pin for two machine
cycles while the oscillator is running resets the de-
vice. The port pins will be driven to their reset condi-
tion when a minimum V
IH2
voltage is applied wheth-
er the oscillator is running or not. An internal pull-
down resistor permits a power-on reset with only a
capacitor connected to V
CC
.
4
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