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參數(shù)資料
| 型號： | 8XL51FA |
| 廠商： | Intel Corp. |
| 英文描述： | LOW VOLTAGE CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLERS |
| 中文描述： | 低壓CHMOS單片8位微控制器 |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 285K |
| 代理商： | 8XL51FA |
8XL51FA/FB/FC
PROGRAMMING THE OTP ROM
To be programmed, the part must be running with a
4 to 6 MHz oscillator. (The reason the oscillator
needs to be running is that the internal bus is being
used to transfer address and program data to appro-
priate internal OTP ROM locations.) The address of
an OTP ROM location to be programmed is applied
to Port 1 and pins P2.0 - P2.4 of Port 2, while the
code byte to be programmed into that location is
applied to Port 0. The other Port 2 and 3 pins, RST
PSEN, and EA/V
PP
should be held at the ‘‘Program’’
levels indicated in Table 3. ALE/PROG is pulsed low
to program the code byte into the addressed OTP
ROM location. The setup is shown in Figure 10.
Normally EA/V
PP
is held at logic high until just be-
fore ALE/PROG is to be pulsed. Then EA/V
PP
is
raised to V
PP
, ALE/PROG is pulsed low, and then
EA/V
PP
is returned to a valid high voltage. The volt-
age on the EA/V
PP
pin must be at the valid EA/V
PP
high level before a verify is attempted. Waveforms
and detailed timing specifications are shown in later
sections of this data sheet.
NOTE:
#
EA/V
PP
pin must not be allowed to go above the
maximum specified V
PP
level for any amount of
time. Even a narrow glitch above that voltage lev-
el can cause permanent damage to the device.
The V
PP
source should be well regulated and free
of glitches.
Table 3. OTP ROM Programming Modes
(H
e
2.7V to 3.6V; H1
e
5V
g
10%)
Mode
RST
PSEN
ALE/
PROG
EA/
V
PP
P2.6
P2.7
P3.3
P3.6
P3.7
V
CC
Program Code Data
H1
L
12.75V
L
H1
H1
H1
H1
H1
Verify Code Data
H
L
H
H
L
L
L
H
H
H
Program Encryption
Array Address 0–3FH
H1
L
12.75V
L
H1
H1
L
H1
H1
Program Lock
Bits
Bit 1
H1
L
12.75V
H1
H1
H1
H1
H1
H1
Bit 2
H1
L
12.75V
H1
H1
H1
L
L
H1
Bit 3
H1
L
12.75V
H1
L
H1
H1
L
H1
Read Signature Byte
H
L
H
H
L
L
L
L
L
H
272356–18
*
See Table 2 for proper input on these pins
Figure 10. Programming the OTP ROM
16
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