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March 14, 2007
2007 Integrated Device Technology, Inc.
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.
Devic e Overview
The 89HPES8NT2 is a member of the IDT PRECISE famly of PCI
Expressswitching solutions offering the next-generation I/O intercon-
nect standard. The PES8NT2 is a 8-lane, 2-port peripheral chip that
provides high-performance switching and non-transparent bridging
(NTB) functions between a PCIeupstreamport and an NTB down-
streamport. The PES8NT2 is a part of the IDT PCIe SystemIntercon-
nect Products and is intended to be used with IDT PCIe System
Interconnect Switches. Together, the chipset targets multi-host and intel-
ligent I/O applications such as communications, storage, and blade
servers where inter-domain communication is required.
Features
◆
High Performance PCI Express Switch
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Eight PCI Express lanes (2.5Gbps), two switch ports
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Delivers 32 Gbps (4 GBps) of aggregate switching capacity
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Low latency cut-through switch architecture
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Support for Max Payload size up to 2048 bytes
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Supports one virtual channel and eight traffic classes
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PCI Express Base specification Revision 1.0a compliant
◆
Flexible Architecture with Numerous Configuration Options
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Supports automatic per port link width negotiation (x8, x4, x2,
or x1)
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Static lane reversal on all ports
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Automatic polarity inversion on all lanes
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Supports locked transactions, allowing use with legacy soft-
ware
–
–
Ability to load device configuration fromserial EEPROM
Ability to control device via SMBus
◆
Non-Transparent Port
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Crosslink support on NTB port
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Four mapping windows supported
Each may be configured as a 32-bit memory or I/O window
May be paired to forma 64-bit memory window
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Interprocessor communication
Thirty-two inbound and outbound doorbells
Four inbound and outbound message registers
Two shared scratchpad registers
–
Allows up to sixteen masters to communicate through the non-
transparent port
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No limt on the number of supported outstanding transactions
through the non-transparent bridge
–
Completely symmetric non-transparent bridge operation
allows simlar/same configuration software to be run
–
Supports direct connection to a transparent or non-transparent
port of another switch
◆
Highly Integrated Solution
–
Requires no external components
–
Incorporates on-chip internal memory for packet buffering and
queueing
–
Integrates eight 2.5 Gbps embedded full duplex SerDes, 8B/
10B encoder/decoder (no separate transceivers needed)
Block Diagram
Figure 1 Internal Block Diagram
8 PCI Express Lanes
x4 Upstream Port and One x4 Downstream Port
2-Port Switch Core
Frame Buffer
Route Table
Port
Arbitration
Scheduler
SerDes
Phy
Logical
Layer
SerDes
Phy
Logical
Layer
SerDes
Phy
Logical
Layer
...
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
SerDes
Phy
Logical
Layer
SerDes
Phy
Logical
Layer
SerDes
Phy
Logical
Layer
...
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
Non-
Transparent
Bridge
89HPES8NT2
Product Brief
8-Lane 2-Port Non-Transparent
PCI Express Switch