
1 of 47
July 19, 2007
2007 Integrated Device Technology, Inc.
DSC 6924
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
Devic e Overview
The 89HPES48T12 is a member of the IDT PRECISE famly of
PCI Expressswitching solutions. The PES48T12 is a 48-lane, 12-port
peripheral chip that performs PCI Express packet switching with a
feature set optimzed for high-performance applications such as servers,
storage, and communications/networking. It provides connectivity and
switching functions between a PCI Express upstreamport and up to
eleven downstreamports and supports switching between downstream
ports.
Features
◆
High Performance PCI Express Switch
–
Twelve switch ports
Six main ports each of which consists of 8 SerDes
Each x8 main port can further bifurcate to 2 x4-ports
–
Forty-eight 2.5 Gbps embedded SerDes
Supports pre-emphasis and receive equalization on per-port
basis
–
Delivers 192 Gbps (24 GBps) of aggregate switching capacity
–
Low-latency cut-through switch architecture
–
Support for Max Payload Size up to 2048 bytes
–
–
Supports one virtual channel and eight traffic classes
PCI Express Base Specification Revision 1.1 compliant
◆
Flexible Architecture with Numerous Configuration Options
–
Port arbitration schemes utilizing round robin algorithms
–
Automatic per port link width negotiation to x8, x4, x2 or x1
–
Automatic lane reversal on all ports
–
Automatic polarity inversion on all lanes
–
Supports locked transactions, allowing use with legacy soft-
ware
–
Ability to load device configuration fromserial EEPROM
–
Ability to control device via SMBus
◆
Highly Integrated Solution
–
Requires no external components
–
Incorporates on-chip internal memory for packet buffering and
queueing
–
Integrates forty-eight 2.5 Gbps embedded full duplex SerDes,
8B/10B encoder/decoder (no separate transceivers needed)
◆
Reliability, Availability, and Serviceability (RAS) Features
–
Redundant upstreamport failover capability
–
Supports optional PCI Express end-to-end CRC checking
Block Diagram
Figure 1 Internal Block Diagram
48 PCI Express Lanes
Up to 6 x8 ports or 12 x4 Ports
12-Port Switch Core
Frame Buffer
Route Table
Port
Arbitration
Scheduler
DL/Transaction Layer
SerDes
x8/x4/x2/x1
DL/Transaction Layer
SerDes
x8/x4/x2/x1
DL/Transaction Layer
SerDes
x8/x4/x2/x1
DL/Transaction Layer
SerDes
x8/x4/x2/x1
Upstream
DL/Transaction Layer
SerDes
x8/x4/x2/x1
DL/Transaction Layer
SerDes
x8/x4/x2/x1
89HPES48T12
Data Sheet
48-Lane 12-Port
PCI Express Switch