參數(shù)資料
型號(hào)： 89HPES12T3G2ZABCG
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 總線控制器
英文描述： 12-Lane 3-Port Gen2 PCI Express Switch
中文描述： PCI BUS CONTROLLER, PBGA324
封裝： 19 X 19 MM, 1 MM PITCH, GREEN, CABGA-324
文件頁(yè)數(shù)： 1/31頁(yè)
文件大?。?/td> 291K
代理商： 89HPES12T3G2ZABCG
1 of 31
September 4, 2007
2007 Integrated Device Technology, Inc.
*Notice: The information in this document is subject to change without notice
DSC 6930
A
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
Devic e Overview
The 89HPES12T3G2 is a member of IDT’s PRECISE famly of PCI
Expressswitching solutions. The PES12T3G2 is a 12-lane, 3-port
Gen2 peripheral chip that performs PCI Express Base switching with a
feature set optimzed for high performance applications such as servers,
storage, and communications/networking. It provides connectivity and
switching functions between a PCI Express upstreamport and two
downstreamports and supports switching between downstreamports.
Features
High Performance PCI Express Switch
–
Twelve 5 Gbps Gen2 PCI Express lanes
–
Three switch ports
One x4 upstreamport
Two x4 downstreamports
–
Low latency cut-through switch architecture
–
Support for Max Payload Size up to 2048 bytes
–
One virtual channel
–
Eight traffic classes
–
PCI Express Base Specification Revision 2.0 compliant
◆
Flexible Architecture with Numerous Configuration Options
–
Automatic per port link width negotiation to x4, x2 or x1
–
Automatic lane reversal on all ports
–
Automatic polarity inversion
–
Ability to load device configuration fromserial EEPROM
◆
Legacy Support
–
PCI compatible INTx emulation
–
Bus locking
◆
Highly Integrated Solution
–
Incorporates on-chip internal memory for packet buffering and
queueing
–
Integrates twelve 5 Gbps embedded SerDes with 8b/10b
encoder/decoder (no separate transceivers needed)
Receive equalization (RxEQ)
◆
Reliability, Availability, and Serviceability (RAS) Features
–
Internal end-to-end parity protection on all TLPs ensures data
integrity even in systems that do not implement end-to-end
CRC (ECRC)
–
Supports ECRC and Advanced Error Reporting
–
Supports PCI Express Native Hot-Plug, Hot-Swap capable I/O
–
Compatible with Hot-Plug I/O expanders used on PC mother-
boards
–
Supports Hot-Swap
◆
Power Management
–
Utilizes advanced low-power design techniques to achieve low
typical power consumption
–
Support PCI Express Power Management Interface specifica-
tion (PCI-PM2.0)
Block Diagram
Figure 1 Internal Block Diagram
3-Port Switch Core / 12 PCI Express Lanes
Frame Buffer
Route Table
Port
Arbitration
Scheduler
SerDes
Phy
Logical
Layer
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
(Port 0)
(Port 2)
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
(Port 4)
SerDes
Phy
Logical
Layer
SerDes
Phy
Logical
Layer
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
89HPES12T3G2
Data Sheet
Advance Information*
12-Lane 3-Port
Gen2 PCI Express Switch
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
89HPES12T3G2ZABCG8 功能描述:開(kāi)關(guān) IC - 各種 RoHS:否 制造商:Fairchild Semiconductor 開(kāi)啟電阻（最大值）: 電源電壓-最大:4.4 V 電源電壓-最小:2.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:WLCSP-9 封裝:Reel
89HPES12T3G2ZBBC 功能描述:Switch Interfacing Interface 324-CABGA (19x19) 制造商:idt, integrated device technology inc 系列:PRECISE?? 包裝:托盤(pán) 零件狀態(tài):有效 應(yīng)用:開(kāi)關(guān)接口 接口:PCI Express 電壓 - 電源:3.3V 封裝/外殼:324-LBGA 供應(yīng)商器件封裝:324-CABGA（19x19） 安裝類型:表面貼裝 標(biāo)準(zhǔn)包裝:84
89HPES12T3G2ZBBC8 功能描述:開(kāi)關(guān) IC - 各種 RoHS:否 制造商:Fairchild Semiconductor 開(kāi)啟電阻（最大值）: 電源電壓-最大:4.4 V 電源電壓-最小:2.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:WLCSP-9 封裝:Reel
89HPES12T3G2ZBBCG 功能描述:開(kāi)關(guān) IC - 各種 RoHS:否 制造商:Fairchild Semiconductor 開(kāi)啟電阻（最大值）: 電源電壓-最大:4.4 V 電源電壓-最小:2.5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:WLCSP-9 封裝:Reel
89HPES12T3G2ZBBCG8 功能描述:接口-I/O擴(kuò)展器 RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
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