
Design and Applications Information
Overview
Copyright 2010 Marvell
Doc. No. MV-S106340-01 Rev. B
August 6, 2010, Preliminary Information
Document Classification: Proprietary
Page 31
5
Design and Applications Information
5.1
Overview
The 88EM8080/88EM8081 is a PWM controller for LED applications with PFC. Flyback topology is
used to simplify the two stage (front-end PFC and output stages) design to a single stage that
includes Power Factor Correction (PFC) and regulation of the output. Compared to the two stage
structure, a single stage with PFC is a more cost effective solution for LED lighting applications. The
following sections provide guidelines for the application design, component selection, and board
layout in order to improve LED application performance with PFC based on the flyback topology.
The 88EM8080/88EM8081 IC control algorithm uses Average Current Mode Control for power factor
correction applications with low harmonic distortion and good noise immunity. The IC senses the
output current and forces it to follow the reference LED current matching the design requirements.
The chip also senses the primary current and forces the average signal of the primary current to
follow the sinusoidal current reference, therefore achieving power factor correction. This is possible
because the bandwidth of the outer current/voltage loop is much smaller than twice the line
frequency. This IC implements the adaptive loop control so that the LED power supply achieves high
power factor even under high input voltage and low load conditions. The device also provides strong
gate drive capability of 1.2A (typical).
There are four analog input signals and one logic output signal for the 88EM8080/88EM8081
controller.
1.
Input voltage signal at VIN pin is a half sinusoidal waveform. It is fed into the VIN pin through
the input voltage resistor divider. This is for the line frequency zero-cross detection for PFC.
Using the zero-crossing detector, the IC can predict the input sinusoidal waveform. The design
of the input voltage divider and the design equations for the prediction of input sinusoidal
voltage are described in the following
Section 5.2.The signal at the VIN pin also provides
brown-out protection because of the minimum VIN voltage requirement. This brown-out
2.
Input signal at FB pin is the output feedback signal through the output voltage resistor divider
plus the compensation. For LED current control, LED current is sensed and fed back to FB pin.
An optocoupler can be used for isolation, if necessary. This signal helps to obtain output voltage
regulation.
3.
Input current sensing signal is derived from the sensing resistor to the ISNS pin. This is for the
average current mode control to achieve a good sinusoidal current waveform and high power
factor. This average current signal is also used for over current protection.
4.
Input over current protection (OCP) signal is a logic signal instead of an analog signal. It is used
to shut down the output at the SW pin when pulled low for cycle by cycle current limiting.
The output signal from the 88EM8080/88EM8081 is the PWM gate drive signal from the SW pin.
The switching frequency on the 88EM8080 device is fixed to 60kHz while the 88EM8081 is fixed to
120kHz. Refer to the 88EM8080/88EM8081 Application Note located on Marvell.com for more
application details.