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參數(shù)資料
| 型號： | 87C751 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 80C51 8-Bit Microcontroller Family2K/64 OTP/ROM, I 2 C, low pin count(80C51 8位微控制器系列（2K/64 OTP/ROM，IIC，低引腳數(shù)）) |
| 中文描述： | 80C51的8位微控制器Family2K/64檢察官辦公室/光盤，的I 2 C，低引腳數(shù)（80C51的8位微控制器系列（2K/64檢察官辦公室/光盤，進(jìn)口證，低引腳數(shù)）） |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 211K |
| 代理商： | 87C751 |
Philips Semiconductors
Product specification
83C751/87C751
80C51 8-bit microcontroller family
2K/64 OTP/ROM, I
2
C, low pin count
1998 May 01
10
Special Function Register – Interrupt Subsystem
Because the interrupt structure is single level on the 83C751, there
is no need for the IP SFR, so it is not used.
Serial Communications
The 8XC751 contains an I
2
C serial communications port instead of
the 80C51 UART. The I
2
C serial port is a single bit hardware
interface with all of the hardware necessary to support multimaster
and slave operations. Also included are receiver digital filters and
timer (timer I) for communication watch-dog purposes. The I
2
C
serial port is controlled through four special function registers; I
2
C
control, I
2
C data, I
2
C status, and I
2
C configuration.
Special Function Register –
Serial Communications
The 83C751 contains many of the special function registers (SFR)
that are found on the 80C51. Due to the different peripheral features
on the 83C751, there are several additional SFRs and several that
have been changed.
Since the standard UART found on the 80C51 has been replaced by
the I
2
C serial interface, the UART SFRs, SCON, and SBUF have
been replaced by I2CON and I2DAT, and two additional I
2
C registers
have been added (I2STA and I2CFG).
I/O Port Latches (P0, P1, P3)
The port latches function the same as those on the 80C51. Since
there is no port 2 on the 83C751, the P2 latch is not used. Port 0 on
the 83C751 has only 3 bits, so only 3 bits of the P0 SFR have a
useful function.
Special Function Register – I/O Port Latches
There is no Port2 on the 8XC751, so P2 is not used. Also, only 3
bits of P0 SFR have a useful function.
Data Pointer (DPTR)
The data pointer (DPTR) consists of a high byte (DPH) and a low
byte (DPL). In the 80C51 this register allows the access of external
data memory using the MOVX instruction. Since the 83C751 does
not support MOVX or external memory accesses, this register is
generally used as a 16-bit offset pointer of the accumulator in a
MOVC instruction. DPTR may also be manipulated as two
independent 8-bit registers.
Table 2. I
2
C Special Function Register Addresses
REGISTER ADDRESS
BIT ADDRESS
NAME
SYMBOL
ADDRESS
MSB LSB
I
2
C control
I
2
C data
I
2
C configuration
I
2
C status
I2CON
98
9F
9E
9D
9C
9B
9A
99
98
I2DAT
99
–
–
–
–
–
–
–
–
I2CFG
D8
DF
DE
DD
DC
DB
DA
D9
D8
I2STA
F8
FF
FE
FD
FC
FB
FA
F9
F8
ROM CODE SUBMISSION
When submitting ROM code for the 80C751, the following must be specified:
1. 2k byte user ROM data
ADDRESS
CONTENT
BIT(S)
COMMENT
0000H to 07FFH
DATA
7:0
User ROM Data
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| 87C751/BLA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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| 87C752 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller family 2K/64 OTP/ROM, 5 channel 8 bit A/D, I2C, PWM, low pin count |
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