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| 型號(hào)： | 840021AKILF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 125 MHz, OTHER CLOCK GENERATOR, QCC16 |
| 封裝： | 3 X 3 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220EED-2, VFQFN-16 |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 767K |
| 代理商： | 840021AKILF |
ICS840021AGI REVISION C JANUARY 27, 2010
8
2010 Integrated Device Technology, Inc.
ICS840021I Data Sheet
FEMTOCLOCK CRYSTAL-TO-LVCMOS/LVTTL CLOCK GENERATOR
Application Information
Power Supply Filtering Technique
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter performance,
power supply isolation is required. ICS840021I provides separate
power supplies to isolate any high switching noise from the outputs to
the internal PLL. VDD and VDDA should be individ- ually connected to
the power supply plane through vias, and 0.01F bypass capacitors
should be used for each pin. Figure 1 illustrates this for a generic VDD
pin and also shows that VDDA requires that an additional 10 resistor
along with a 10
F bypass capacitor be connected to the V
DDA pin.
Figure 1. Power Supply Filtering
Crystal Input Interface
The ICS840021I has been characterized with 18pF parallel resonant
crystals. The capacitor values, C1 and C2, shown in Figure 2 below
were determined using a 25MHz, 18pF parallel resonant crystal and
were chosen to minimize the ppm error. The optimum C1 and C2
values can be slightly adjusted for different board layouts.
Figure 2. Crystal Input Interface
VDD
VDDA
3.3V
10
10F
.01F
XTAL_IN
XTAL_OUT
X1
18pF Parallel Crystal
C1
33p
C2
22p
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