ICS840004I-01
FEMTOCLOCKS CRYSTAL-TO-LVCMOS/LVTTL CLOCK SYNTHESIZER
IDT / ICS LVCMOS/LVTTL FREQUENCY SYNTHESIZER
5
ICS840004AGI-01 REV. B OCTOBER 31, 2008
AC Electrical Characteristics
Table 5A. AC Characteristics, VDD = VDDO = 3.3V ± 5%, TA = -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the
device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after
thermal equilibrium has been reached under these conditions.
NOTE 1: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Please refer to the Phase Noise Plot.
Table 5B. AC Characteristics, VDD = 3.3V ± 5%, VDDO = 2.5V ± 5%, TA = -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the
device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after
thermal equilibrium has been reached under these conditions.
NOTE 1: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Please refer to the Phase Noise Plot.
Parameter
Symbol
Test Conditions
Minimum
Typical
Maximum
Units
fout
Output Frequency
F_SEL[1:0] = 00
140
156.25
175
MHz
F_SEL[1:0] = 01 or 11
112
125
140
MHz
F_SEL[1:0] = 10
56
62.5
70
MHz
tsk(o)
Output Skew: NOTE 1, 2
60
MHz
tjit()
RMS Phase Jitter (Random);
NOTE 3
156.25MHz, Integration Range:
1.875MHz – 20MHz
0.52
ps
125MHz, Integration Range:
1.875MHz – 20MHz
0.65
ps
62.5MHz, Integration Range:
1.875MHz – 20MHz
0.55
ps
tR / tF
Output Rise/Fall Time
20% to 80%
200
700
ps
odc
Output Duty Cycle
F_SEL[1:0] = 00, 01 or 11
43
57
%
F_SEL[1:0] = 10
49
51
%
Parameter
Symbol
Test Conditions
Minimum
Typical
Maximum
Units
fout
Output Frequency
F_SEL[1:0] = 00
140
156.25
175
MHz
F_SEL[1:0] = 01 or 11
112
125
140
MHz
F_SEL[1:0] = 10
56
62.5
70
MHz
tsk(o)
Output Skew: NOTE 1, 2
60
MHz
tjit()
RMS Phase Jitter (Random);
NOTE 3
156.25MHz, Integration Range:
1.875MHz – 20MHz
0.48
ps
125MHz, Integration Range:
1.875MHz – 20MHz
0.59
ps
62.5MHz, Integration Range:
1.875MHz – 20MHz
0.53
ps
tR / tF
Output Rise/Fall Time
20% to 80%
200
700
ps
odc
Output Duty Cycle
F_SEL[1:0] = 00, 01 or 11
43
57
%
F_SEL[1:0] = 10
49
51
%