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Product Datasheet
5
82571EB/82572EI Gigabit Ethernet Controller
2.0
Features of the 82571EB/82572EI Gigabit Ethernet
Controller
2.1
PCI Express Features
2.2
MAC-Specific Features
Features
Benefits
Uses x4 PCI Express interface on MCH device
Bus sharing not required
Low latency path to memory
Relieves congestion for IO devices
Peak bandwidth 2 GB/s in each direction per PCI Express
lane
Supports Gigabit Ethernet at full wire speed
PCI Express Power Management
Compatible extensions to PCI power management and
ACPI
PE_WAKE_n available for wakeup event
High bandwidth density per pin
Less congested board routing
Features
Benefits
Optimized transmit and receive queues
Network packets handled without waiting or buffer
overflow.
IEEE 802.3x compliant flow control support with software
controllable pause times and threshold values
Control over the transmissions of pause frames through
software or hardware triggering
Frame loss reduced from receive overruns
Caches up to 64 packet descriptors (per queue)
Efficient use of PCI Express bandwidth
Separate transmit queue per port
Efficient packet prioritization
Programmable host memory receive buffers (256 Bytes to
16 KBytes) and cache line size (64 Bytes to 128 Bytes)
Efficient use of PCI Express bandwidth
Wide, pipelined internal data path architecture
Low latency data handling
Superior DMA transfer rate performance
Dual 48 KByte configurable Transmit and Receive FIFO
buffers
No external FIFO memory requirements
FIFO size adjustable to application
Descriptor ring management hardware for transmit and
receive
Simple software programming model
Optimized descriptor fetching and write-back mechanisms
Efficient system memory and use of PCI Express
bandwidth
Mechanism available for reducing interrupts generated by
transmit and receive operations
Maximizes system performance and throughput
Supports transmission and reception of packets up to 9 kB
Enables jumbo frames