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參數(shù)資料
| 型號(hào)： | 80960CF-25 |
| 廠商： | Intel Corp. |
| 英文描述： | 32-Bit High-Performance Superscalar Embedded Microprocessor(32位高性能超標(biāo)量嵌入式微處理器) |
| 中文描述： | 32位高性能嵌入式微處理器超標(biāo)量（32位高性能超標(biāo)量嵌入式微處理器） |
| 文件頁數(shù)： | 1/77頁 |
| 文件大?。?/td> | 927K |
| 代理商： | 80960CF-25 |
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INTEL CORPORATION, 1996
June 1996
Order Number:
272886-001
A
PRELIMINARY
80960CF-40, -33, -25, -16
32-BIT HIGH-PERFORMANCE SUPERSCALAR
EMBEDDED MICROPROCESSOR
Socket and Object Code Compatible with 80960CA
Two Instructions/Clock Sustained Execution
Four 71 Mbytes/s DMA Channels with Data Chaining
Demultiplexed 32-Bit Burst Bus with Pipelining
I
32-Bit Parallel Architecture
— Two Instructions/clock Execution
— Load/Store Architecture
— Sixteen 32-Bit Global Registers
— Sixteen 32-Bit Local Registers
— Manipulates 64-Bit Bit Fields
— 11 Addressing Modes
— Full Parallel Fault Model
— Supervisor Protection Model
I
Fast Procedure Call/Return Model
— Full Procedure Call in 4 Clocks
I
On-Chip Register Cache
— Caches Registers on Call/Ret
— Minimum of 6 Frames Provided
— Up to 15 Programmable Frames
I
On-Chip Instruction Cache
— 4 Kbyte Two-Way Set Associative
— 128-Bit Path to Instruction Sequencer
— Cache-Lock Modes
— Cache-Off Mode
I
High Bandwidth On-Chip Data RAM
— 1 Kbyte On-Chip Data RAM
— Sustains 128 bits per Clock Access
I
Selectable Big or Little Endian Byte
Ordering
I
Four On-Chip DMA Channels
— 71 Mbytes/s Fly-by Transfers
— 40 Mbytes/s Two-Cycle Transfers
— Data Chaining
— Data Packing/Unpacking
— Programmable Priority Method
I
32-Bit Demultiplexed Burst Bus
— 128-Bit Internal Data Paths to
and
from
Registers
— Burst Bus for DRAM Interfacing
— Address Pipelining Option
— Fully Programmable Wait States
— Supports 8-, 16- or 32-Bit Bus Widths
— Supports Unaligned Accesses
— Supervisor Protection Pin
I
High-Speed Interrupt Controller
— Up to 248 External Interrupts
— 32 Fully Programmable Priorities
— Multi-mode 8-Bit Interrupt Port
— Four Internal DMA Interrupts
— Separate, Non-maskable Interrupt Pin
— Context Switch in 625 ns Typical
I
On-Chip Data Cache
— 1 Kbyte Direct-Mapped, Write Through
— 128 bits per Clock Access on Cache Hit
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 80960CF-33 | 32-Bit High-Performance Superscalar Embedded Microprocessor(32位高性能超標(biāo)量嵌入式微處理器) |
| 80960CF-40 | 32-Bit High-Performance Superscalar Embedded Microprocessor(32位高性能超標(biāo)量嵌入式微處理器) |
| 80960CF | 32-Bit High-Performance Superscalar Processor(32位高性能超標(biāo)量處理器) |
| 80960JD | EMBEDDED 32-BIT MICROPROCESSOR |
| 80960JT | EMBEDDED 32-BIT MICROPROCESSOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 80960CF-30 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:SPECIAL ENVIRONMENT 80960CF-30, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR PROCESSOR |
| 80960CF-33 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:80960CF-40, -33, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR EMBEDDED MICROPROCESSOR |
| 80960CF-40 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:80960CF-40, -33, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR EMBEDDED MICROPROCESSOR |
| 80960HA | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:80960HA/HD/HT 32-Bit High-Performance Superscalar Processor |
| 80960HD | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:80960HA/HD/HT 32-Bit High-Performance Superscalar Processor |
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