參數(shù)資料
型號： 80-0206-R
廠商： Electronic Theatre Controls, Inc.
英文描述： Speech Recognition Processor
中文描述： 語音識別處理器
文件頁數(shù)： 9/49頁
文件大?。?/td> 527K
代理商： 80-0206-R
Data Sheet
RSC-4128
Using the RSC-4128
9
P/N 80-0206-R
2006 Sensory Inc.
Creating applications using the RSC-4128 requires the development of electronic circuitry, software code, and
speech/music data files. Software code for the RSC-4128 can be developed using a complete suite of RSC-4128
development tools including In-Circuit Emulator, C Compiler, and “push button” tools for speech recognition and
synthesis data files. Sensory provides free design reviews of customer applications to assist in the speech dialog
and speech I/O design. Sensory also offers application development services. For more information about
development tools and services, please contact Sensory.
When using the RSC-4128 macro blocks such as the AFE, digital filters, L1, etc, for purposes other than as
intended in the FluentChip technology modules, in applications that will also use FluentChip technologies, care
must be taken to avoid conflicts that may cause adverse impact on functionality. Contact Sensory Technical
Support for help in avoiding these conflicts.
Instruction Set
The instruction set for the RSC-4128 has 60 instructions comprising 13 move, 7 rotate, 11 branch, 22 arithmetic,
and 7 miscellaneous instructions. All instructions are 3 bytes or fewer and no instruction requires more than 10
clock cycles (plus wait states) to execute. (see “Instruction Set Opcodes and Timing Details” for detailed
descriptions)
Flags
The “flags” register (register FF) has bits that are set/cleared by arithmetic/logical instructions, a trap enable bit set
under program control, a read-only stack overflow bit cleared at power on and set by stack wrap around, and the
Global Interrupt Enable bit:
0FFH R/W
“flags”
Bit 7:
carry
Bit 6:
zero
(set = 1 when result of arith/log instruction is 0)
Bit 5:
sign
(set = 1 when result of arith/log instruction has msb high)
Bit 4:
trap
Bit 3:
stkoflo
(read-only, initialized to 0, set to 1 on stack overflow)
Bit 3:
stkfull
(read-only, initialized to 0, set to 1 on stack full)
Bit 1:
(unused)
Bit 0:
gie
(Global Interrupt Enable)
NOTE: The “trap” bit must be left written as “0”.
Flags Hold
The “flagsHold” register (register CF) stores the “flags” value when an interrupt occurs. Unlike previous RSC chips,
the RSC-4128 processor has read/write access to “flagsHold” for multi-tasking purposes. Since the “flags” register
is restored from the “flagsHold” register upon return from interrupt, the “stkoflo” and “stkfull” bits are omitted from
the “flagsHold” register to prevent inadvertent clearing of these bits.
0CFH R/W
“flagsHold”
Bit 7:
carry
Bit 6:
zero
Bit 5:
sign
Bit 4:
trap
Bit 3:
(unused – reads 0)
Bit 2:
(unused – reads 0)
Bit 1:
(unused – reads 0)
Bit 0:
gie
NOTE: The “trap” bit must be left written as “0”.
See the discussion in “Interrupts” section relating to the value of “gie” stored in the “flagsHold” register when an
interrupt occurs during execution of an instruction that clears the “gie” bit.
相關(guān)PDF資料
PDF描述
80-0207-A Speech And Music Processor
80-0208-B Speech And Music Processor
80-0209-A Speech And Music Processor
80-0210-C Speech And Music Processor
80-0211-C Speech And Music Processor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
80-0207-A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Speech And Music Processor
80-0208-B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Speech And Music Processor
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80-0209-A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Speech And Music Processor
80020D 功能描述:SCRDR DUAL MAT MAG KEY TP 3/8"X1 制造商:apex tool group 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:6
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