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| 型號： | 7LB176 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | DIFFERENTIAL BUS TRANSCEIVERS |
| 中文描述： | 差分總線收發(fā)器 |
| 文件頁數(shù)： | 8/22頁 |
| 文件大?。?/td> | 440K |
| 代理商： | 7LB176 |
SLLS067G AUGUST 1990 REVISED APRIL 2006
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOC
2
RL
VOD2
Vtest
VOD3
60
375
375
2
RL
Figure 1. Driver V
OD
and V
OC
Figure 2. Driver V
OD3
VOLTAGE WAVEFORMS
50%
tt(OD)
td(ODL)
10%
tt(OD)
≈
2.5 V
≈
2.5 V
90%
50%
Output
td(ODH)
0 V
3 V
1.5 V
Input
TEST CIRCUIT
Output
CL = 50 pF
(see Note B)
RL = 54
50
3 V
Generator
(see Note A)
1.5 V
Figure 3. Driver Test Circuit and Voltage Waveforms
VOLTAGE WAVEFORMS
tPHZ
1.5 V
2.3 V
0.5 V
0 V
3 V
tPZH
Output
Input
1.5 V
S1
0 V or 3 V
Output
TEST CIRCUIT
50
VOH
Voff
≈
0 V
RL = 110
Generator
(see Note A)
CL = 50 pF
(see Note B)
Figure 4. Driver Test Circuit and Voltage Waveforms
TEST CIRCUIT
Output
RL = 110
5 V
S1
50
3 V or 0 V
VOLTAGE WAVEFORMS
5 V
0.5 V
VOL
tPZL
3 V
0 V
tPLZ
2.3 V
1.5 V
Output
Input
CL = 50 pF
(see Note B)
Generator
(see Note A)
1.5 V
Figure 5. Driver Test Circuit and Voltage Waveforms
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR
≤
1 MHz, 50% duty cycle, tr
≤
6 ns, tf
≤
6 ns,
ZO= 50
.
B. CL includes probe and jig capacitance.
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