參數(shù)資料
型號: 7C256-25
廠商: Alliance Semiconductor Corporation
英文描述: High Performance 32Kx8 CMOS SRAM
中文描述: 高性能32Kx8 CMOS SRAM的
文件頁數(shù): 4/8頁
文件大小: 125K
代理商: 7C256-25
AS7C256
AS7C256L
4
Parameter
Symbol
-10
-12
-15
-20
-25
-35
Unit
Notes
Min Max Min Max Min Max Min Max Min Max Min Max
Read Cycle Time
t
RC
t
AA
t
ACE
t
OE
t
OH
t
CLZ
t
CHZ
t
OLZ
t
OHZ
t
PU
t
PD
10
12
15
20
25
35
ns
Address Access Time
10
12
15
20
25
35
ns
3
Chip Enable (CE) Access Time
10
12
15
20
25
35
ns
3
Output Enable (OE) Access Time
3
3
4
5
6
8
ns
Output Hold from Address Change
2
3
3
3
3
3
ns
5
CE LOW to Output in Low Z
3
3
3
3
3
3
ns
4, 5
CE HIGH to Output in High Z
3
3
4
5
6
8
ns
4, 5
OE LOW to Output in Low Z
0
0
0
0
0
0
ns
4, 5
OE HIGH to Output in High Z
3
3
4
5
6
8
ns
4, 5
Power Up Time
0
0
0
0
0
0
ns
4, 5
Power Down Time
10
12
15
20
25
35
ns
4, 5
READ CYCLE
(V
CC
= 5V
±
10%, GND = 0V, T
a
= 0°C to +70°C)
3, 9
3, 6, 7, 9
TIMING WAVEFORM OF READ CYCLE 1
(Address Controlled)
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AA
AA
AA
AA
Address
D
out
Data Valid
t
OH
t
AA
t
RC
3, 6, 8, 9
TIMING WAVEFORM OF READ CYCLE 2
(CE Controlled)
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
Supply
Current
CE
OE
D
out
t
RC1
t
OE
t
OLZ
t
ACE
t
CHZ
t
CLZ
t
PU
t
PD
I
CC
I
SB
50%
50%
t
OHZ
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AA
AA
AA
AA
AA
Data Valid
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
A
A
A
A
A
AS7C256-04
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