參數(shù)資料
型號(hào): 7C256-25
廠商: Alliance Semiconductor Corporation
英文描述: High Performance 32Kx8 CMOS SRAM
中文描述: 高性能32Kx8 CMOS SRAM的
文件頁(yè)數(shù): 1/8頁(yè)
文件大?。?/td> 125K
代理商: 7C256-25
ALLIANCE
SEMICONDUCTOR
A
8
A
7
High Performance
32K
×
8
CMOS SRAM
AS7C256
AS7C256L
32K
×
8 CMOS SRAM (Common I/O)
LOGIC BLOCK DIAGRAM
FEATURES
Organization: 32,768 words
×
8 bits
High speed
– 10/12/15/20/25/35 ns address access time
– 3/3/4/5/6/8 ns output enable access time
Low power consumption
– Active:
660 mW max (10 ns cycle)
– Standby:
11 mW max, CMOS I/O
2.75 mW max, CMOS I/O, L version
– Very low DC component in active power
2.0V data retention (L version)
Equal access and cycle times
Easy memory expansion with CE and OE inputs
TTL-compatible, three-state I/O
28-pin JEDEC standard packages
– 300 mil PDIP and SOJ
Socket compatible with 7C512 and 7C1024
– 330 mil SOIC
– 8
×
13.4 TSOP
ESD protection > 2000 volts
Latch-up current > 200 mA
SELECTION GUIDE
PIN ARRANGEMENT
256
×
128
×
8
ARRAY
(262,144)
INPUT BUFFER
A0
A1
A2
A3
A4
A5
A6
A14
A
9
A
10
A
11
A
12
A
13
I/O0
I/O7
Vcc
GND
OE
CE
WE
COLUMN DECODER
R
CONTROL
CIRCUIT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
WE
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
A
S
AS7C256-02
AS7C256-01
7C256-10
7C256-12
7C256-15
7C256-20
7C256-25
7C256-35
Unit
Maximum Address Access Time
10
12
15
20
25
35
ns
Maximum Output Enable Access Time
3
3
4
5
6
8
ns
Maximum Operating Current
120
115
110
100
90
80
mA
Maximum CMOS Standby Current
2.0
2.0
2.0
2.0
2.0
2.0
mA
L
0.5
0.5
0.5
0.5
0.5
0.5
mA
Vcc
A14
A12
A7
A6
A5
A4
A3
WE
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
A2
A1
A0
I/O0
I/O1
I/O2
DIP, SOJ, SOIC
TSOP 8
×
13.4
22
23
24
25
26
27
28
1
2
3
4
5
6
7
21
20
19
18
17
16
15
14
13
12
11
10
AS7C256
9
8
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