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參數(shù)資料
| 型號： | 79RC32355150DH |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | Communications Processor |
| 中文描述： | 通信處理器 |
| 文件頁數(shù)： | 8/47頁 |
| 文件大?。?/td> | 987K |
| 代理商： | 79RC32355150DH |
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8 of 47
May 25, 2004
IDT 79RC32355
GPIOP[17]
I/O
High Drive
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: Memory and peripheral bus chip select, CSN[5].
GPIOP[18]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: External DMA device request, DMAREQN.
GPIOP[19]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: External DMA device done, DMADONEN.
GPIOP[20]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: USB start of frame, USBSOF.
GPIOP[21]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: SDRAM clock enable CKENP.
GPIOP[22]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: ATM transmit PHY address, TXADDR[0].
GPIOP[23]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
1st Alternate function: ATM transmit PHY address, TXADDR[1].
2nd Alternate function: Active DMA channel code, DMAP[0].
GPIOP[24]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: ATM receive PHY address, RXADDR[0].
GPIOP[25]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
1st Alternate function: ATM receive PHY address, RXADDR[1].
2nd Alternate function: Active DMA channel code, DMAP[1].
GPIOP[26]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: TDM external buffer enable, TDMTEN.
GPIOP[27]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: Memory and peripheral bus address, MADDR[22].
GPIOP[28]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: Memory and peripheral bus address, MADDR[23].
GPIOP[29]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: Memory and peripheral bus address, MADDR[24].
GPIOP[30]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: Memory and peripheral bus address, MADDR[25].
GPIOP[31]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
1ST Alternate function: DMA finished, DMAFIN.
2nd Alternate function: EJTAG/ICE reset, EJTAG_TRST_N.
GPIOP[32]
I/O
High Drive
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: TDM interface data output, TDMDOP. At reset, this pin defaults to the primary function, GPIOP[32].
GPIOP[33]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: TDM interface data input, TDMDIP. At reset, this pin defaults to the primary function, GPIOP[33].
GPIOP[34]
I/O
High Drive
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: TDM interface frame signal, TDMFP. At reset, this pin defaults to the primary function, GPIOP[34].
GPIOP[35]
I/O
Low Drive
with STI
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function: TDM interface clock, TDMCLKP. At reset, this pin defaults to the primary function, GPIOP[35].
DMA
DMAFIN
O
Low
External DMA finished.
This signal is asserted low by the RC32355 when the number of bytes specified in the DMA
descriptor have been transferred to or from an external device.
Primary function: General Purpose I/O, GPIOP[31]. At reset, this pin defaults to primary function GPIOP[31].
2nd Alternate function: EJTAG_TRST_N.
Name
Type I/O Type
Description
Table 1 Pin Descriptions (Part 4 of 8)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 79RC32355150DHI | Communications Processor |
| 79RC32355180DH | Communications Processor |
| 79RC32355180DHI | Communications Processor |
| 79RC32T355180DHI | Communications Processor |
| 79RC32355 | Communications Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 79RC32355-150DH | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32355150DHI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Communications Processor |
| 79RC32355-150DHI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32355180DH | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Communications Processor |
| 79RC32355-180DH | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
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