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參數(shù)資料
| 型號： | 79RC32355133DH |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | Communications Processor |
| 中文描述： | 通信處理器 |
| 文件頁數(shù)： | 2/47頁 |
| 文件大?。?/td> | 987K |
| 代理商： | 79RC32355133DH |
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2 of 47
May 25, 2004
IDT 79RC32355
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USB
–
–
–
–
–
–
–
◆
TDM
–
Revision 1.1 compliant
USB slave device controller
Supports a 6
th
USB endpoint
Full speed operation at 12 Mb/s
Supports control, interrupt, bulk and isochronous endpoints
Supports USB remote wakeup
Integrated USB transceiver
Serial Time Division Multiplexed (TDM) voice and data inter-
face
Provides interface to telephone CODECs and DSPs
Interface to high quality audio A/Ds and D/As with external
glue logic
Support 1 to 128 8-bit time slots
Compatible with Lucent CHI, GCI, Mitel ST-bus, K2 and SLD
busses
Supports data rates of up to 8.192 Mb/s
Supports internal or external frame generation
Supports multiple non-contiguous active input and output time
slots
◆
EJTAG
–
Run-time Mode provides a standard JTAG interface
–
Real-Time Mode provides additional pins for real-time trace
information
◆
Ethernet
–
Full duplex support for 10 and 100 Mb/s Ethernet
–
IEEE 802.3u compatible Media Independent Interface (MII)
with serial management interface
–
IEEE 802.3u auto-negotiation for automatic speed selection
–
Flexible address filtering modes
–
64-entry hash table based multicast address filtering
–
–
–
–
–
–
–
◆
ATM SAR
–
Can be configured as one UTOPIA level 1 interface or 1
UTOPIA level 2 interface with 2 address lines (3 PHYs max)
–
Supports 25Mb/s and faster ATM
–
Supports UTOPIA data path interface operation at speeds up
to 33 MHz
–
Supports standard 53-byte ATM cells
–
Performs HEC generation and checking
–
Cell processing discards short cells and clips long cells
–
16 cells worth of buffering
–
UTOPIA modes: 8 cell input buffer and 8 cell output buffer
–
Hardware support for CRC-32 generation and checking for
AAL5
–
Hardware support for CRC-10 generation and checking
–
Virtual caching receive mechanism supports reception of any
length packet without CPU intervention on up to eight simulta-
neously active receive channels
–
Frame Mode transmit mechanism supports transmission of
any length packet without CPU intervention
◆
System Features
–
JTAG Interface (IEEE Std. 1149.1 compatible)
–
208 pin PQFP package
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2.5V core supply and 3.3V I/O supply
–
Up to 180 MHz pipeline frequency and up to 75 MHz bus
frequency
Figure 2 Example of xDSL Residential Gateway Using RC32355
SLIC
Codec
Echo
POTS telephone
RJ11
EthernetTransceiver
MII I/F
DMA
Channels
USB
TDM
Timers
UART
Interrupt Ctl
RC32300 CPU Core
Data Buffers
SDRAM Ctl
Memory &
I/O Controller
ATM I/F
Ethernet MAC
Ethernet to PC
Clock
32-bit Data Bus
SDRAM
Memory & I/O
Transmission
Convergence
Data Pump
AFE
USB to PC
Debug port
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 79RC32355150DH | Communications Processor |
| 79RC32355150DHI | Communications Processor |
| 79RC32355180DH | Communications Processor |
| 79RC32355180DHI | Communications Processor |
| 79RC32T355180DHI | Communications Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 79RC32355-133DH | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Communications Processor |
| 79RC32355133DHI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Communications Processor |
| 79RC32355-133DHI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32355150DH | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Communications Processor |
| 79RC32355-150DH | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
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