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參數(shù)資料
| 型號(hào)： | 79RC32355133DH |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | Communications Processor |
| 中文描述： | 通信處理器 |
| 文件頁(yè)數(shù)： | 13/47頁(yè) |
| 文件大?。?/td> | 987K |
| 代理商： | 79RC32355133DH |
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13 of 47
May 25, 2004
IDT 79RC32355
MDATA[11]
Hold SYSCLKP Constant
. For systems that do not require a SYSCLKP output and can instead use CLKP, setting this bit to a one causes the
SYSCLKP output to be held at a constant level. This may be used to reduce EMI.
0x0 - Allow SYSCLKP to toggle
0x1 - Hold SYSCLKP constant
MDATA[12]
JTAG Boundary Scan Reset Enable
. When this bit is set, Alternate 2 pin function, JTAG_TRST_N is selected.
0x0 - GPIOP[2] pin behaves as GPIOP
0x1 - GPIOP[2] pin behaves as JTAG_TRST_N
MDATA[13]
CPU / DMA Transaction Indicator Enable
. When this bit is set, Alternate 2 pin function, CPUP is selected.
0x0 - GPIOP[4] pin behaves as GPIOP
0x1 - GPIOP[4] pin behaves as CPUP
MDATA[15:14]
Reserved
. These pins must be driven low during boot configuration.
Signal
Name/Description
Table 2 Boot Configuration Vector Encoding (Part 2 of 2)
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| 79RC32355150DH | Communications Processor |
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相關(guān)代理商/技術(shù)參數(shù) |
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| 79RC32355-133DH | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Communications Processor |
| 79RC32355133DHI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Communications Processor |
| 79RC32355-133DHI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
| 79RC32355150DH | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:Communications Processor |
| 79RC32355-150DH | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT Interprise Integrated Communications Processor |
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