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參數(shù)資料
| 型號： | 795T |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 3V Supervisor with Battery Switchover |
| 中文描述： | 3V的監(jiān)控與電池切換 |
| 文件頁數(shù)： | 10/32頁 |
| 文件大小： | 304K |
| 代理商： | 795T |
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STM690/704/795/802/804/805/806
10/32
Chip-Enable Gating (STM795 only)
Internal gating of the chip enable (E) signal pre-
vents erroneous data from corrupting the external
CMOS RAM in the event of an undervoltage con-
dition. The STM795 uses a series transmission
gate from E to E
CON
(see Figure
12
). During nor-
mal operation (reset not asserted), the E transmis-
sion gate is enabled and passes all E transitions.
When reset is asserted, this path becomes dis-
abled, preventing erroneous data from corrupting
the CMOS RAM. The short E propagation delay
from E to E
CON
enables the STM795 to be used
with most μPs. If E is low when reset asserts,
E
CON
remains low for typically 10μs to permit the
current WRITE cycle to complete.
Chip Enable Input (STM795 only)
The chip-enable transmission gate is disabled and
E is high impedance (disabled mode) while reset
is asserted. During a power-down sequence when
V
CC
passes the reset threshold, the chip-enable
transmission gate disables and E immediately be-
comes high impedance if the voltage at E is high.
If E is low when reset asserts, the chip-enable
transmission gate will disable 10μs after reset as-
serts (see Figure
13
). This permits the current
WRITE cycle to complete during power-down.
Any time a reset is generated, the chip-enable
transmission gate remains disabled and E remains
high impedance (regardless of E activity) for the
first half of the reset time-out period (t
rec
/2). When
the chip enable transmission gate is enabled, the
impedance of E appears as a 40
resistor in se-
ries with the load at E
CON
. The propagation delay
through the chip-enable transmission gate de-
pends on V
CC
, the source impedance of the drive
connected to E, and the loading on E
CON
. The chip
enable propagation delay is production tested
from the 50% point on E to the 50% point on E
CON
using a 50
driver and a 50pF load capacitance
(see
Figure 36., page 23
). For minimum propaga-
tion delay, minimize the capacitive load at E
CON
and use a low-output impedance driver.
Chip Enable Output (STM795 only)
When the chip-enable transmission gate is en-
abled, the impedance of E
CON
is equivalent to a
40
resistor in series with the source driving E. In
the disabled mode, the transmission gate is off
and an active pull-up connects E
CON
to V
OUT
(see
Figure
12
). This pull-up turns off when the trans-
mission gate is enabled.
Figure 12. Chip-Enable Gating
Figure 13. Chip Enable Waveform (STM795)
AI08802
V
RST
V
OUT
V
CC
COMPARE
E
CON
t
Generator
E
CON
OUTPUT
CONTROL
RST
E
AI08855c
RST
E
V
CC
V
RST
V
BAT
E
CON
trec
trec
trec
trec
10μs
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