參數(shù)資料
型號(hào): 784217AY
廠商: NEC Corp.
英文描述: MOS INTEGRATED CIRCUIT
中文描述: 馬鞍山集成電路
文件頁數(shù): 70/100頁
文件大?。?/td> 564K
代理商: 784217AY
Data Sheet U14121EJ2V0DS00
70
μ
PD784214A, 784215A, 784216A, 784217A, 784218A, 784214AY, 784215AY, 784216AY, 784217AY, 784218AY
Main System Clock Oscillator Characteristics (T
A
=
40 to +85
°
C)
Resonator
Recommended Circuit
Parameter
Conditions
MIN.
TYP.
MAX.
Unit
4.5 V
V
DD
5.5 V
2
12.5
2.7 V
V
DD
< 4.5 V
2
6.25
2.0 V
V
DD
< 2.7 V
2
3.125
Ceramic
resonator
or crystal
resonator
X2
X1 V
SS
Oscillation frequency
(f
X
)
1.8 V
V
DD
< 2.0 V
2
2
MHz
4.5 V
V
DD
5.5 V
2
12.5
2.7 V
V
DD
< 4.5 V
2
6.25
2.0 V
V
DD
< 2.7 V
2
3.125
X1 input frequency (f
X
)
1.8 V
V
DD
< 2.0 V
2
2
MHz
X1 input high-/low-
level width (t
WXH
, t
WXL
)
15
250
ns
4.5 V
V
DD
5.5 V
0
5
2.7 V
V
DD
< 4.5 V
0
10
2.0 V
V
DD
< 2.7 V
0
20
External
clock
X2
X1
PD74HCU04
μ
X1 input rising/falling
time (t
XR
, t
XF
)
1.8 V
V
DD
< 2.0 V
0
30
ns
Cautions 1. When using the main system clock oscillator, wire as follows in the area enclosed by the
broken lines in the above figures to avoid an adverse effect from wiring capacitance.
Keep the wiring length as short as possible.
Do not cross the wiring with other signal lines.
Do not route the wiring near a signal line through which a high fluctuating current flows.
Always make the ground point of the oscillator capacitor the same potential as V
SS
.
Do not ground the capacitor to a ground pattern through which a high current flows.
Do not fetch signals from the oscillator.
2. When the main system clock is stopped and the system is operated by the subsystem clock,
the subsystem clock should be switched back to the main system clock after the oscillation
stabilization time is secured by the program.
Remark
For the resonator selection and oscillator constant, users are required to either evaluate the oscillation
themselves or apply to the resonator manufacturer for evaluation.
www.DataSheet4U.com
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