參數(shù)資料
型號: 784217AY
廠商: NEC Corp.
英文描述: MOS INTEGRATED CIRCUIT
中文描述: 馬鞍山集成電路
文件頁數(shù): 53/100頁
文件大?。?/td> 564K
代理商: 784217AY
Data Sheet U14121EJ2V0DS00
53
μ
PD784214A, 784215A, 784216A, 784217A, 784218A, 784214AY, 784215AY, 784216AY, 784217AY, 784218AY
www.DataSheet4U.com
Table 8-2. Interrupt Sources (2/2)
Source
Type
Default
Priority
Name
Trigger
Internal/
External
Macro
Service
INTSR1
End of UART reception by ASI1
10
INTCSI1
End of 3-wire transfer by CSI1
11
INTST1
End of UART transmission by ASI1
12
INTSER2
Occurrence of UART reception error in ASI2
INTSR2
End of UART reception by ASI2
13
INTCSI2
End of 3-wire transfer by CSI2
14
INTST2
End of UART transmission by ASI2
15
INTTM3
Reference time interval signal from watch timer
16
INTTM00
Signal indicating match between 16-bit timer
counter and capture/compare register (CR00)
17
INTTM01
Signal indicating match between 16-bit timer
counter and capture/compare register (CR01)
18
INTTM1
Occurrence of match signal of 8-bit timer/event
counter 1
19
INTTM2
Occurrence of match signal of 8-bit timer/event
counter 2
20
INTAD
End of conversion by A/D converter
21
INTTM5
Occurrence of match signal of 8-bit timer/event
counter 5
22
INTTM6
Occurrence of match signal of 8-bit timer/event
counter 6
23
INTTM7
Occurrence of match signal of 8-bit timer/event
counter 7
24
INTTM8
Occurrence of match signal of 8-bit timer/event
counter 8
25
INTWT
Overflow of watch timer
Internal
Maskable
26 (lowest)
INTKR
Detection of falling edge of port 8
External
Remarks 1.
ASI: Asynchronous Serial Interface
CSI: Clocked Serial Interface
2.
There are two interrupt sources for the watchdog timer: non-maskable interrupts (INTWDT) and
maskable interrupts (INTWDTM). Either one (but not both) should be selected for actual use.
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