M
17
All data sheets are subject to change without notice
2005 Maxwell Technologies
All rights reserved.
16-Bit Latchup Protected Analog to Digital Converter
7809LP
01.11.05 Rev 7
Testing the 7809LPRP Latchup Protection Circuitry
The LPVANA and LPVDIG pins provide direct access to the 7809LP converter supply pins for attaching external
decoupling capacitors to ground. These pins can also be used to test the LPT
TM
operation and threshold level by sink-
ing a pulsed current load to ground as shown in the test circuit in Figure 8. The most accurate threshold current mea-
surements are made with the ADS7809 in its lowest power state (PWRD = 5V).
The LPT
TM
operation and device recovery times are most easily measured using the LPBIT input to trigger protection
and recovery. Applying a 10 μsec high duration TTL level to the LPBIT pin causes internal test currents sufficient to
trigger the LPT
TM
circuit to be drawn through both the analog and digital supply sense circuits.
LPT
TM
operating characteristics are summarized in Table 16 according to the timng diagramshown in Figure 9. Dur-
ing the time that the power is cycled, output signals and data fromthe 7809LP are invalid. The LPSTATUS signal high
indicates that power is removed fromthe ADS7809 die. When this signal is low power is applied to the ADS7809 die.
The LPSTATUS signal is used to measure the supply recovery time. The supply recovery time interval starts when the
supply current rises (causing LPSTATUS to go high) and ends when the LPSTATUS signal stabilizes low again.
Within the functional recovery time interval (~25 μsec after the LPT
TM
circuit reapplies power), the normal functional
operation of the converter is restored with less than 5% full scale error. Additional settling time is then required to
return to full accuracy operation. Recovery time intervals are defined which indicate the time to recover first to within 8
bit accuracy, then to within 12 bit accuracy, and finally to full 16 bit accuracy. These recovery times are primarily due to
the single event and power cycling effects on the reference circuits and the settling times of their respective filter
capacitors.
T
ABLE
16. 7809LP LPT
TM
O
PERATING
C
HARACTERISTICS
P
ARAMETER
S
YMBOL
C
ONDITIONS
T
YP
U
NIT
Supply Threshold Current
Protection Time
Supply Recovery Time
Functional Recovery Time
8-bit Accuracy Recovery Time
Full Accuracy Recovery Time
ITHR
TPT
TSR
TFR
T8R
TFAR
PWRD = 5V
LPBIT = 2.4V for 5 μs
LPBIT = 2.4V for 5 μs
LPBIT = 2.4V for 5 μs
LPBIT = 2.4V for 5 μs
LPBIT = 2.4V for 5 μs
75
10
50
mA
μsec
μsec
μsec
μsec
msec
TSR + 25
80
5