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參數(shù)資料
| 型號： | 7809LPRPFI |
| 廠商： | MAXWELL TECHNOLOGIES |
| 元件分類： | ADC |
| 英文描述： | 16-Bit Latchup Protected Analog to Digital Converter |
| 中文描述： | 3-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, DFP24 |
| 封裝： | FP-24 |
| 文件頁數(shù)： | 16/23頁 |
| 文件大?。?/td> | 462K |
| 代理商： | 7809LPRPFI |
M
16
All data sheets are subject to change without notice
2005 Maxwell Technologies
All rights reserved.
16-Bit Latchup Protected Analog to Digital Converter
7809LP
01.11.05 Rev 7
Dedicated digital outputs are not simlarly protected since in most applications there will be no appreciable drive signal
on these outputs to back-drive the pins. Pull up resistors on these outputs should be 10 K
or greater to limt the
back-drive current. Low on resistance, transmssion gate circuits are also connected between the package pins and
the die REF and CAP pins. These gates mnimze the transient loading on the external filter capacitors required on
these pins. This greatly reduces the single event recovery time of the 7809LP to full accuracy after an LPT
TM
cycle.
During an LPT
TM
cycle, all outputs of the 7809LP are invalid and unpredictable until after the functional recovery time.
After the functional recovery time, data conversions occur with a degraded accuracy until the full accuracy recovery
time.
A summary of the pin differences between the ADS7809 and the 7809LP is provided in the table below
T
ABLE
15. ADS7809
AND
7809LP P
IN
D
IFFERENCES
P
IN
N
UMBER
ADS7809
7809LPRP
P
IN
D
IFFERENCE
D
ESCRIPTION
1-10
Various
Various
Equivalent function to ADS7809 pins 1-10 respectively. Timng specifications
change slightly (0 - 10 ns) for the 7809LPRP due to the latchup protection circuitry
on ADS7809 die inputs.
Equivalent function to ADS7809 pins 11-18 respectively. Timng specifications
change slightly (0 - 10 ns) for the 7809LPRP due to the latchup protection circuitry
on ADS7809 die inputs.
A built in test function of latchup protection. A TTL high level pulse for > 5 mcrosec-
onds duration on this input will trigger latchup protection of the device. This input
shall be low during normal operation.
Latchup protection status output. This TTL level output is low during normal opera-
tion and goes high during a 10 μs decision time period prior to power being
removed. If the latch up current does not last at least 10 μs then LPTSTATUS will
go low (inactive) after the 10 μs decision period without power being removed.
When latchup protection is triggered, this output will go high for the duration of the
time that power is removed fromthe protected device (50 μs). All output except
LPSTATUS are invalid during the time that power is removed fromthe ADS7809
die. This output foes low within 1 us of the power being re-applied to the protected
device. Functional operation of the device is within ~25 μs after the LPSTATUS
output returns low with degraded accuracy due to the latchup filter circuitry. Full
accuracy is restored ~5 ms later. This output can be used to informthe systempro-
cessor of the latchup protection trigger and the subsequent degraded accuracy in
the 7809LPRP output data. Output pull-up resistors should be 10k
or larger on
outputs. I/O pins must not be driven high while this signal is active.
Equivalent function to ADS7809 pin 19. Analog Supply Input.
Equivalent function to ADS7809 pin 20. Digital Supply Input.
Latchup protected analog supply pin to the ADS7809 die. Decouple to analog
ground with 0.1 μF ceramc capacitor. Do not exceed 0.2 μF. Do not connect to
VDIG and/or VANA.
Latchup protected digital supply pin to the ADS7809 die. Decouple to digital ground
with 0.1 μF ceramc capacitor. Do not exceed 0.2 μF. Do not connect to VDIG and/
or VANA.
15-22
Various
Various
11
--
LPBIT
12
--
LPSTATUS
13
14
23
VANA
VDIG
--
VANA
VDIG
LPVANA
24
--
LPVDIG
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| 7809R-010-500 | 制造商:Belden Inc 功能描述: |
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