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參數(shù)資料
| 型號： | 7542 |
| 英文描述： | 250mA CMOS LDO, lsupply 1uA and 2% Vout Accuracy, -40C to +125C, 3-SOT-23, T/R |
| 中文描述： | 7542群時鐘異步串行I / OApplication注意70K/MAY.22.03 |
| 文件頁數(shù)： | 2/9頁 |
| 文件大?。?/td> | 70K |
| 代理商： | 7542 |
May 2003
7542 Group
Clock Asynchronous Serial I/O (UART)
Page 2 of 8
REJ05B0023-0100Z
3.0 Contents
For clock asynchronous serial I/O (UART), the baud rate and transfer formats used by a transmitter and
receiver must be identical.
In the 7542 Group, eight serial data transfer formats can be selected.
Also, as for the serial I/O2, since it has an equivalent function to serial I/O1, the application example of
the following serial I/O1 is applicable for serial I/O2.
3.1 Data Transfer Rate
The transfer bit rate is calculated by the following formula;
G
When the internal clock is selected (when baud rate generator is used)
Transfer bit rate [bps] =
Division ratio*
1
: “1” or “4” is selected (set by bit 0 of serial I/O1 control register)
BRG1 setting value*
2
: 0 to 255 (00
16
to FF
16
) is set
G
When the external clock is selected
Transfer bit rate [bps] = Clock input to S
CLK1
pin/16
Table 1 shows the setting example of baud rate generator and transfer bit rate values.
Table 1 Setting example of baud rate generator1 (BRG1) and transfer bit rate values
BRG count source
BRG1 set value
f(X
IN
)
Division ratio
*1
(BRG1 setting value
*2
+ 1)
16
f(X
IN
) / 4
f(X
IN
) / 4
f(X
IN
) / 4
f(X
IN
) / 4
f(X
IN
) / 4
f(X
IN
) / 4
f(X
IN
) / 4
f(X
IN
) / 4
f(X
IN
)
f(X
IN
)
f(X
IN
)
255 (FF
16
)
127 (7F
16
)
63 (3F
16
)
31 (1F
16
)
15 (0F
16
)
7 (07
16
)
3 (03
16
)
1 (01
16
)
3 (03
16
)
1 (01
16
)
0 (00
16
)
Transfer bit rate (bps)
At f(X
IN
) = 4.9152 MHz
300
600
1200
2400
4800
9600
19200
38400
76800
153600
307200
At f(X
IN
) = 8 MHz
488.28125
976.5625
1953.125
3906.25
7812.5
15625
31250
62500
125000
250000
500000
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